category: IoT and Security

category: Auto, Security & Edge AI

Protecting Chiplet Architectures With Hardware Security
By Scott Best - 08 Oct, 2020 - Comments: 0

Chiplets are gaining significant traction as they provide compelling benefits for advancing semiconductor performance, costs, and time to market. With Moore’s Law slowing, building more powerful chips translates into building bigger chips. But with chip dimensions pushing up against reticle limits, growing the size of chips is increasingly impractical. Chiplets offer a new path forward by dis... » read more

Chips Listening To Gibberish
By Jörg Bormann - 08 Oct, 2020 - Comments: 0

We all talk gibberish once in a while. At least, I do. I might be in a silly mood, thinking aloud, listening to music or talking over the phone using my headphones (they are quite small, and if you don’t notice them, you could think I am crazy). Regardless of the circumstances, I mean no harm, I promise. However, it’s still possible that a passer-by could get distracted trying to figure out... » read more

Secure Silicon Lifecycle Management Architecture For Functional Safety
By Lee Harrison - 08 Oct, 2020 - Comments: 0

The rapid growth of electronics for automotive applications fueled by advanced ADAS systems pose new challenges for complex SoC design and Silicon Lifecycle Management (SLM) in the supply chain as well as in-field monitoring and management of the population of chips. In these modern complex devices, ensuring the correct and safe operation requires not only functional safety to check for reli... » read more

AI Design In Korea
By Kurt Shuler - 08 Oct, 2020 - Comments: 0

Like many in the semiconductor design businesses, Arteris IP is actively working with the Korean chip companies. This shouldn’t be a surprise. If a company is building an SoC of any reasonable size, it needs network-on-chip (NoC) interconnect for optimal QoS (bandwidth and latency regulation and system-level arbitration) and low routing congestion, even in application-centric designs such as ... » read more

One More Time: TOPS Do Not Predict Inference Throughput
By Geoff Tate - 08 Oct, 2020 - Comments: 0

Many times you’ll hear vendors talking about how many TOPS their chip has and imply that more TOPS means better inference performance. If you use TOPS to pick your AI inference chip, you will likely not be happy with what you get. Recently, Vivienne Sze, a professor at MIT, gave an excellent talk entitled “How to Evaluate Efficient Deep Neural Network Approaches.” Slides are also av... » read more

Sensor Fusion Challenges In Cars
By Ann Mutschler - 08 Oct, 2020 - Comments: 0

The automotive industry is zeroing in on sensor fusion as the best option for dealing with the complexity and reliability needed for increasingly autonomous vehicles, setting the stage for yet another shift in how data from multiple devices is managed and utilized inside a vehicle. The move toward greater autonomy has proved significantly more complicated than anyone expected at first. There... » read more

Are FPGAs More Secure Than Processors?
By Bryon Moyer - 08 Oct, 2020 - Comments: 0

Security concerns often focus on software being executed on processors. But not all electronic functionality runs in software. FPGAs provide another way to do work, and they can be more secure than functions executed in software. FPGAs provide more control of hardware and are more opaque to attackers. In the case of embedded FPGAs, the designer is in complete control of the entire system. Th... » read more

How Cybersecurity Is Driving Business Forward
By Joe Jarzombek - 08 Oct, 2020 - Comments: 0

Cybersecurity is a topic that continues to grow in importance for both the general population and those who work in the tech industry. While news headlines about security breaches affecting various companies are now almost a daily occurrence, many still don’t understand the responsibility that every one of us has to keep our own personal and workplace networks secure. This October, Synopsys w... » read more

One SerDes Solution Doesn’t Fit All
By Paul McLellan - 08 Oct, 2020 - Comments: 0

Way back in the 1960s, E. Rent, who was working at IBM at the time, noticed a connection between the number of pins P on integrated circuits being used and the number of gates G on the integrated circuits. It was a power law, where the number of pins was cGR where c and R are constants. Actually, traditionally a Greek rho is used instead of R. It usually has a value between 0.5 and 0.8. If R... » read more

HW Security Better, But Attack Surface Is Growing
By Ed Sperling - 08 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security on chips with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of strategy at Arm. What follows are excerpts of that conversation,... » read more

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