category: System-Level Design

category: Auto, Security & Edge AI

Hybrid Emulation Takes Center Stage
By Ann Mutschler - 25 Jul, 2019 - Comments: 0

From mobile to networking to AI applications, system complexity shows no sign of slowing. These designs, which may contain multiple billion gates, must be validated, verified and tested, and it’s no longer possible to just throw the whole thing in a hardware emulator. For some time, emulation, FPGA-based prototyping, and virtual environments such as simulators have given design and verific... » read more

How To Optimize Verification
By Brian Bailey - 25 Jul, 2019 - Comments: 0

The rate of improvement in verification tools and methodologies has been nothing short of staggering, but that has created new kinds of problems for verification teams. Over the past 20 years, verification has transformed from a single language (Verilog) and tool (simulator) to utilizing many languages (testbench languages, assertion languages, coverage languages, constraint languages), many... » read more

Optimize MATLAB C/C++ Code For HLS
By Zubair Wadood - 25 Jul, 2019 - Comments: 0

A common use case for high-level synthesis (HLS) is taking 3rd party generated or legacy C/C++ algorithms and converting the algorithm to a hardware implementation using an HLS compiler. This can present many challenges to the developer since there is little insight or understanding of the underlying code. In a recently published white paper, we examine how SLX FPGA is used to take a MATLAB... » read more

Konica Minolta Proves C++ Level Signoff Possibilities Using Catapult HLS Platform
By Mentor, a Siemens Business - 24 Jul, 2019 - Comments: 0

A team’s ultimate goal is to move verification up to the C++ level in order to minimize the time spent in RTL verification and to achieve C++ signoff. A team at Konica Minolta® has been using the Catapult HLS Platform for many years to dramatically improve their productivity by coding at the C++ level and using the platform to generate RTL. They recently evaluated the high-level verification... » read more

Say Welcome to the Machine: Low-Power Machine Learning for Smart IoT Applications
By Synopsys - 24 Jul, 2019 - Comments: 0

By Pieter van der Wolf, Principal R&D Engineer, Synopsys Inc. and Dmitry Zakharov, Senior Software Engineer, Synopsys Inc Smart IoT devices that interact intelligently with their users are appearing in many application areas. Increasingly, these devices apply machine learning technology for processing captured sensor data, so that smart actions can be taken based on recognized patterns. ... » read more

Cybersecurity And Functional Safety: The Case For Embedded Analytics
By UltraSoC - 24 Jul, 2019 - Comments: 0

From advanced driver assistance systems (ADAS) to a new generation of robots and medical systems, we are seeing an explosion in the development of cyber-physical systems. Because these systems use advanced software to interact with the physical world, security and safety are paramount concerns. These issues are reflected in many industries by the use of safety and security standards based on a ... » read more

Blog Review: July 24
By Jesse Allen - 24 Jul, 2019 - Comments: 0

Synopsys' Taylor Armerding notes that while two Florida cities may have saved taxpayers millions by paying ransomware demands, doing so is likely setting up a ransomware tsunami that threatens other municipalities. In a video, Cadence's Jacek Duda digs into what's going on with the upcoming USB4 standard and what will change compared to USB 3.x. Mentor's Colin Walls shares a few embedded ... » read more

Improving Execution Predictability On Linux With SLX
By Silexica - 24 Jul, 2019 - Comments: 0

For many applications, predictability and determinism are often times more desirable than raw performance. This is especially true in emerging markets, like cyber-physical systems or the internet-of-things. For many practical reasons, however, most engineers rely on Linux, which in multicore systems is usually neither predictable nor deterministic. This whitepaper analyzes the predictability of... » read more

Meeting The Demands Of PAM4 Systems At 56Gbps And Beyond
By eSilicon - 24 Jul, 2019 - Comments: 0

According to an IDC white paper sponsored by Seagate the global datasphere will grow from 33 zettabytes (one zettabye = one trillion gigabytes) in 2018 to 175 zettabytes by 2025. This white paper also reports that today, more than 5 billion consumers interact with data every day. By 2025, that number will be 6 billion, or 75 percent of the world’s population. Figure 1 depicts this exponential... » read more

System Bits: July 23
By Jeff Dorsch - 23 Jul, 2019 - Comments: 0

Superconductivity seen in trilayer graphene Stanford University and University of California at Berkeley researchers discovered signs of superconductivity in stacking three-layer sheets of graphene, they report. “It’s definitely an exciting development,” says Cory Dean, a physicist at Columbia University. Dean notes that bilayer graphene superconducts only when the atomic lattices of ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy