The Smartphonification Of Things


By Ann Steffora Mutschler The term, ‘Internet of Things,’ was first coined more than a decade ago by technology visionary Kevin Ashton but has slowly trickled down to the world of chip design and is now mentioned constantly in conversation. The reason is simple: System-level design tools are getting sophisticated enough to handle the intricacies required by devices in an Internet of ... » read more

More Than Data Management


By Ann Steffora Mutschler Managing the people, the data and the technology are just as important as meeting the market window given that without these, the entire project wouldn’t function. Throw huge data set sizes, different cultures and business management issues into the mix and the challenges are many. Fortunately, these are issues that the semiconductor industry has been refining for ... » read more

Continuous, Connected And Concurrent Verification


By Ed Sperling It’s a wonder that any electronic system works as intended, or that it continues to work months or years after it is sold. The reason: SoCs have become so complex that no verification coverage model is sufficient anymore, no methodology covers every aspect of verification, and no single tool or even collection of tools can catch every bug or prevent them from being there in th... » read more

Experts At The Table: Verification Strategies


By Ed Sperling System-Level Design sat down to discuss verification strategies and changes with Harry Foster, chief verification scientist at Mentor Graphics: Janick Bergeron, verification fellow at Synopsys; Pranav Ashar, CTO at Real Intent; Tom Anderson, vice president of marketing at Breker Verification Systems; and Raik Brinkmann, president and CEO of OneSpin Solutions. What follows are e... » read more

Network Software Bring Up


By Tom De Schutter With their latest Cortex-A processors, and especially the ARMv8 Cortex-A57 processor, ARM has provided the right scalability and performance required for network applications. Porting and developing software for these multicore/multi-cluster designs, however, is not a trivial task and cannot be done as an afterthought. That is the topic that Robert Kaye from ARM and I addres... » read more

Observation Post


By Pranav Ashar After attending the 2013 Design and Verification Conference (DVCon) in San Jose, Calif., I have compiled notes as both an observer and a panel participant. Here are my observations: Wally Rhines, CEO of Mentor Graphics, gave the keynote presentation: Accelerating EDA Innovation Through SoC Design Methodology Convergence. Logically and effectively he made the case that SoC in... » read more

Staying Neutral


By Kurt Shuler It’s official: The great IP land grab has begun. The process actually has been taking place gradually, but has accelerated with Imagination Technologies’ acquisition of MIPS last year and, most recently, Cadence’s acquisition of Tensilica. For makers of semiconductors, four competing IP behemoths are emerging after years of fragmentation within the semiconductor IP indu... » read more

The Business Of Things


By Frank Ferro The Internet of things (IOT) will create $14 trillion dollars in business opportunities according to Cisco. Unless you are a government accumulating debt, most of us think that’s a big number—and a big opportunity. The much quoted “50 billion connected devices to the Internet by 2020” forecast is the impetus driving companies in all parts of the ecosystem including infra... » read more

The Best Abstraction


By Jon McDonald The other day I was asked what would be the best level of abstraction to model at for system-level design. This is a question I get, in one form or another, far too often. It reminds me of an old quote attributed to Lincoln, slightly updated and applied to this subject: “One model can answer some of the questions all of the time, and all of the questions some of the time, but... » read more

Market Realities


The speculation about EDA’s future—will it consolidate, will it be incorporated into large IDMs or foundries—has surfaced again. The reason this time is that EDA is in a retrenchment period as the semiconductor industry grapples with increasing complexity, multiple options ranging from multi-patterning to stacked die to more third-party IP, and the rising cost of complex SoCs at the mo... » read more

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