category: System-Level Design

category: Auto, Security & Edge AI

Bringing Continuous Domain Into SystemVerilog Covergroups
By Various Writers - 26 Jul, 2012 - Comments: 0

This paper proposes a set of requirements for specifying functional coverage on an analog or mixed-signal block. We explain how the real number data type can be introduced in the [gettech id="31023" comment="SystemVerilog"] coverpoint specification and how it can enable a complete coverage specification for a mixed-signal verification environment. In discussing the requirements, we explore the... » read more

More Design Rules Ahead
By Ed Sperling - 25 Jul, 2012 - Comments: 0

By Ed Sperling & Mark LaPedus For those companies that continue to push the limits of feature shrinkage, designs are about to become more difficult, far more expensive—and much more regulated. Two converging factors will force these changes. First, the limits of current 193nm immersion lithography mean companies now must double pattern at 20nm, and potentially quadruple pattern at 14n... » read more

Increasing Certainty For 20nm Design
By Frank Schirrmeister - 25 Jul, 2012 - Comments: 0

By Frank Schirrmeister At the recent Design Automation Conference two topics were getting very special attention: Design at 20nm and System-Level Design. This is very indicative of the very opposite trends we have been facing in semiconductor designs for the last couple of decades. On the one hand, the actual design units get smaller and smaller, and we are today happily designing for technolo... » read more

Experts At The Table: Does 20nm Break System-Level Design?
By Ed Sperling - 13 Jul, 2012 - Comments: 1

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at Atr... » read more

Disaggregation And Re-aggregation
By Ed Sperling - 02 Jul, 2012 - Comments: 0

The proliferation of platforms, subsystems and IP of any sort, as well as the move to stack die in 2.5D configurations, will force a realignment of the ecosystem. For the moment, it appears that vertically integrated companies such as Apple and Samsung have a distinct advantage. It remains to be seen just how substantial that advantage really is, however. As chips become a collection of more... » read more

Experts At The Table: The Future Of SystemC
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ed Sperling System-Level Design moderated a discussion about the future of SystemC with Thomas Alsop, corporate design solution expert at Intel; Ambar Sarkar, chief verification technologist at Paradigm Works; Mike Meredith, vice president of technical marketing at Forte Design Systems; David Black, certified training instructor at Doulos. Here are some of the key outtakes of that discussio... » read more

Experts At The Table: Does 20nm Break System-Level Design?
By Ed Sperling - 28 Jun, 2012 - Comments: 1

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at Atr... » read more

Emulation’s Winding Path To Success
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ed Sperling Emulation was developed for verifying complex ICs when simulation was considered too slow. After more than a decade of very slow growth, however, sales have begun to ramp. There are several reasons for this shift. First, SoCs simply are becoming more complex, and the amount of verification that needs to be done to get a chip out the door can bring simulation to a crawl. Desig... » read more

Leveraging The Past
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler It’s easy to forget that not every design today is targeted at 20nm, given the amount of focus put on the bleeding edge of technology. But in fact a large number of designs utilize the stability and reliability of older manufacturing nodes, as well as lower mask costs, by incorporating new design and verification techniques, with 2.5D designs being a prime example. ... » read more

The Trouble With Models
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler Models and modeling concepts seem to be on the tip of every tongue these days. Once the promise of sparking true ESL design, the use of system-level models has settled into something more like enabling software development. There is also talk of leveraging models across the supply chain, but is this really possible yet? The concept of doing this incremental refinem... » read more

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