category: System-Level Design

category: Auto, Security & Edge AI

“Selling System-Level Design”
By Frank Schirrmeister - 20 Mar, 2012 - Comments: 0

By Frank Schirrmeister Between reviewing what happened in 2011, trying to predict what 2012 will have in store, and planning activity for the system-level design product line I am working on at Cadence, I ran across my notes and the summary of Jeff Cox’s book “Selling the Wheel”. As Silicon Valley high tech marketers we all have been accustomed to Geoffrey Moore’s “Crossing the Ch... » read more

Experts At The Table: ESL Reality Check
By Ed Sperling - 09 Mar, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss electronic-system-level design with Stephen Bailey, director of emerging technologies for the design verification technology group at Mentor Graphics; Michael McNamara, vice president and general manager of Cadence’s System-Level Division; Ghislain Kaiser, CEO of DOCEA Power, and Shawn McCloud, vice president of marketing at Calypto. Wh... » read more

Experts At The Table: ESL Reality Check
By Ed Sperling - 02 Mar, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss electronic-system-level design with Stephen Bailey, director of emerging technologies for the design verification technology group at Mentor Graphics; Michael McNamara, vice president and general manager of Cadence’s System-Level Division; Ghislain Kaiser, CEO of DOCEA Power, and Shawn McCloud, vice president of marketing at Calypto. Wh... » read more

What Have Models Got To Do With It?
By Achim Nohl - 23 Feb, 2012 - Comments: 0

By Achim Nohl Transaction-level models are the main building blocks of virtual prototypes, which are used for early software development. In my last blog post, I briefly introduced the different kinds of software tasks and the implications for models. Today, I want to talk about the modeling requirements for early SoC bring up. As I mentioned, understanding the software requirements correct... » read more

The Downside Of Derivatives
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Ann Steffora Mutschler From a planning perspective, creating derivative chips seems a straightforward task, but the process is much more complex than simply replacing or adding a peripheral—it starts with identifying the right team of engineers to perform that process. “One of the needs in the market is somebody to have vertical expertise to do derivative design and yet be cost-effec... » read more

3D Standards For The Real World
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Pallab Chatterjee Stacking die has progressed from what is technologically possible to what will be realistically feasible in a fabless or fab-lite world. The big challenges may be less about how to deal with stress caused by a TSV or thermal density and more about companies working together in a disaggregated supply chain. This was quite evident at a recent DesignCon panel dicussion on ... » read more

Derivative ICs: A Look At The Options
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Ann Steffora Mutschler With the cost of designing and producing even moderately advanced SoCs skyrocketing, semiconductor companies and systems houses must find ways to defray the cost across a larger number of end uses than ever. As such many companies have adopted a platform-based derivative design approach, with that the platform serving as the first SoC design of a new family. That s... » read more

Different Tradeoffs
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Ed Sperling The push to “smaller, faster and cheaper” hasn’t changed since ICs were first introduced, but the context for those requirements is beginning to shift—with enormous consequences. What was once done on multiple chips continue to migrate to a single chip or package because of cost, but in some cases the decisions about goes where go well beyond an individual device to i... » read more

Market Catches Up With Verification IP
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Ed Sperling Ever since verification IP was introduced it was seen as something that should be given away with purchased IP. The result was limited investment by IP vendors, frustration on the part of IP customers, and a market opportunity that nearly fizzled before it even began. But as the amount of commercially developed IP content continues to grow in ICs, the potential interactions ... » read more

Interchip Connectivity
By Kurt Shuler - 23 Feb, 2012 - Comments: 0

By Kurt Shuler It may seem strange to link two interchip interface standards to the future of3D integrated circuits, but please bear with me for a few minutes. I hope to prove that the learning from today will impact how we design SoCs in the near future. C2C and LLI: The first standards created with the “combo chip” in mind As you may already know, the purposes of the chip-to-chip (C2... » read more

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