Coherency Becomes A Stack Of Issues


By Ed Sperling As complexity increases and the industry increasingly shifts away from ASICs to SoCs, the concept of coherency is beginning to look more like a stack of issues than a discrete piece of the design. There are at least five levels of coherency that need to be considered already, with more likely to surface as stacked die become mainstream over the next few years. Perhaps even mo... » read more

The Software Side Of Derivatives


By Ann Steffora Mutschler With the options and perils associated with derivative designs well articulated today, the elephant remaining in the room is, of course, software. The software aspect of derivatives is bit muddier with some claiming the software can be maintained without modification, while others assert this is simply not possible. One indisputable fact is that software develop... » read more

SoCs Go Mainstream


By Ed Sperling The monolithic ASIC, which has been the bread-and-butter of chipmakers for decades, is giving way to systems on a chip among mainstream chipmakers and at mainstream process nodes. This shift has been overhyped, overpromised and slow to materialize. While SoCs have been common for years in mobile electronics and for high-performance platforms such as gaming consoles, they have... » read more

Why PCs And Servers Aren’t Going Away


By Pallab Chatterjee With the rise of mobile appliances, smart phones and tablets, there has been a lot of discussion about the place for PCs, servers, embedded processors and networks. A number of companies have claimed they will rule the world of computing and there will no room for others. Reality seems to be somewhat different, however. The mobile end point devices—smart phones, table... » read more

Making Sense Of Virtualization


By Achim Nohl In the last month I’ve had the opportunity to get some hands-on experience with hardware virtualization and hypervisors. My knowledge so far on this has been mainly limited to what I could read about it and what other people are saying about it. However, the PowerPoint slides I’ve seen leave a lot of white fog between the bullet items. This didn’t make me feel very comfo... » read more

The Three Consequences Of Fewer Design Starts


By Kurt Shuler Gartner’s Feb. 27 report, “Market Trends: Worldwide, ASIC and ASSP Design Starts Continue Declining Trend, 2012,” by analysts Bryan Lewis and Ganesh Ramamoorthy, gives all of us insight into what the semiconductor world will look like a few years in the future. Combined with Gartner’s reports on semiconductor design IP, we can gain an understanding of how the semicond... » read more

Speed Matters


By Frank Ferro Speed is the shiny object, the undisputed premium, and in many ways, the ultimate carrot with customers when designing advanced SoCs. There are a few moments when the conversation temporarily shifts to area, or some special feature, but we always come back to speed, or more specifically, frequency. This is without a doubt the first and most important requirement ‘gate’ to pa... » read more

Cycle-Accurate Models?


By Jon McDonald I was sitting in a meeting this week and someone made the statement, “I have to have a cycle-accurate model.” This was a meeting discussing early delivery of system models for software development, performance and power analysis. The final RTL didn't even exist for the device in question, yet somehow the thinking was that a “cycle-accurate” model was required. I hear th... » read more

New Winners And Losers


The realignment of the semiconductor industry has begun, most of it beneath the radar screen. In a disaggregated supply chain, any piece in isolation looks insignificant. But taken together, these shifts begin to paint a picture of a broad realignment and refocusing of the entire industry that ultimately will cement the fortunes of some and create new winners and losers out of others. The fi... » read more

When Stacked Die Make Sense


By Javier DeLaCruz There are two general flavors of 3D-TSV technology. Images for these can be seen in the previous blog entry The Future of ASICs in 3D. 3D-IC has vias in silicon containing active circuitry. 2.5D is similar, but uses passive silicon, glass or organic interposers to enable very fine pitch interconnection between the active die mounted on top. There is some discussion about ... » read more

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