category: System-Level Design

category: Auto, Security & Edge AI

Advanced RISC-V Verification Methodology Projects
By Imperas - 24 May, 2023 - Comments: 0

The open standard of RISC-V offers developers new freedoms to explore new design flexibilities and enable innovations with optimized processors. As a design moves from concept to implementation new resources are appearing to help with standards for testbenches, verification IP reuse, and coverage analysis. RISC-V offers every SoC team the possibility to design an optimized processor, but this a... » read more

Improving Network Security Threat Detection
By Keysight - 24 May, 2023 - Comments: 0

Collecting security-related information is one thing. Getting the most benefit from that data is another. Security analysts get lots of alerts from their security tools. This forces them to prioritize the ones that will get investigated. When additional context is added to the security data, it makes it easier to see what traffic needs a closer look. For instance, discovery, forensics, and reme... » read more

Computational Imaging Craves System-Level Design And Simulation Tools To Leverage Disruptive AI In Embedded Vision
By Synopsys - 24 May, 2023 - Comments: 0

Image quality now relies more than ever on high computing power tied to miniaturized optics and sensors, rather than on standalone and bulky but aberration-free optics. This new trend is called computational imaging and can be used either for computational photography or for computer vision. Read this white paper to learn about market trends and promising system co-design and co-optimization ap... » read more

Celsius EC Solver
By Cadence - 24 May, 2023 - Comments: 0

The Cadence Celsius EC Solver is electronics cooling simulation software for accurate and fast analysis of the thermal performance of electronic systems. It enables electronic system designers to accurately address the most challenging thermal/electronics cooling issues today. The Celsius EC Solver utilizes a powerful computational engine and meshing technology that enables designers to model a... » read more

Smallest Thinnest Power Modules For Data Center Optical Modules
By Renesas - 24 May, 2023 - Comments: 0

Data transmission rates in optical communication field are on a constant rise. This paper describes the ever-increasing demand for highly integrated, small form factor, low profile yet thermally superior and electrically efficient power supply solution to support these high data rates and large amount of data transfer. It then follows to highlight Renesas’s best in class mini power mo... » read more

The Impact Of ML On Chip Design
By Ed Sperling - 22 May, 2023 - Comments: 0

Node scaling and rising complexity are increasing the time it takes to get chips out the door. At the same time, design teams are not getting larger. What is needed is a way to automate the creative process, and to not have to start every design from scratch. This is where reinforcement learning fits in, with its ability to centralize and store “tribal knowledge. Thomas Andersen, vice preside... » read more

Blog Review: May 17
By Jesse Allen - 17 May, 2023 - Comments: 0

Synopsys' Dana Neustadter examines the key industries driving Ethernet security, challenges to securing Ethernet networks, and the MACsec protocol that guards against network data breaches by encrypting data traffic between Ethernet-connected devices. Siemens' Stephen Chavez points to the improvements gained from design reuse in PCB design but warns that inefficient processes for managing an... » read more

Week In Review: Design, Low Power
By Jesse Allen - 12 May, 2023 - Comments: 1

Synopsys acquired Silicon Frontline Technology, a provider of an electrical layout verification solution for mixed-signal and analog designs, large-scale power semiconductor devices, and electrostatic discharge protection networks. "This acquisition enables Synopsys to extend the capabilities of our design analysis portfolio and help build out a system-level electrical analysis platform. We als... » read more

Blog Review: May 10
By Jesse Allen - 10 May, 2023 - Comments: 0

Synopsys' Alessandra Nardi and Uyen Tran explain how to meet quality, reliability, functional safety, and security requirements of automotive chips through thorough test programs, path-margin monitoring, and design failure mode and effect analysis (DFMEA). Cadence's Veena Parthan explores how computational fluid dynamics can help predict and model the generation, propagation, and mitigation ... » read more

Challenges In Writing SDC Constraints
By Ed Sperling - 08 May, 2023 - Comments: 0

Writing design constraints is becoming more difficult as chips become more heterogeneous, and as they are expected to function longer in the field. Timing and power can change over time, and constraints need to be adjusted to that changing context. Synopsys’ Ajay Daga, group director for R&D at Synopsys, talks about the challenges in pushing constraints down to different hierarchical portions... » read more

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