category: Technical Papers

category: Auto, Security & Edge AI

5G as a wireless power grid
By Technical Paper Link - 31 Jan, 2021 - Comments: 0

Abstract "5G has been designed for blazing fast and low-latency communications. To do so, mm-wave frequencies were adopted and allowed unprecedently high radiated power densities by the FCC. Unknowingly, the architects of 5G have, thereby, created a wireless power grid capable of powering devices at ranges far exceeding the capabilities of any existing technologies. However, this potential c... » read more

Learning properties of ordered and disordered materials from multi-fidelity data
By Technical Paper Link - 14 Jan, 2021 - Comments: 0

Source: Chen, C., Zuo, Y., Ye, W. et al. Learning properties of ordered and disordered materials from multi-fidelity data. Nat Comput Sci 1, 46–53 (2021). https://doi.org/10.1038/s43588-020-00002-x Abstract: "Predicting the properties of a material from the arrangement of its atoms is a fundamental goal in materials science. While machine learning has emerged in recent years as a n... » read more

Improving the Performance Of Deep Neural Networks
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Source: North Carolina State University. Authors: Xilai Li, Wei Sun, and Tianfu Wu Abstract: "In state-of-the-art deep neural networks, both feature normalization and feature attention have become ubiquitous. They are usually studied as separate modules, however. In this paper, we propose a light-weight integration between the two schema and present Attentive Normalization (AN). Instead of l... » read more

Versatile Thin‐Film Transistor with Independent Control of Charge Injection and Transport for Mixed Signal and Analog Computation
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Source: University Of Surrey: Eva Bestelink Olivier de Sagazan Lea Motte Max Bateson Benedikt Schultes S. Ravi P. Silva Radu A. Researchers at University of Surrey and Université de Rennes developed a new device, called a Multimodal Transistor (MMT), that is immune to parasitic effects. In the MMT, on/off switching is controlled independently from the amount of current passing th... » read more

Solution-processable integrated CMOS circuits based on colloidal CuInSe2 quantum dots
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Researchers at Los Alamos National Laboratory and University of California Irvine used quantum dots to create transistors which can be assembled into functional logic circuits. “Potential applications of the new approach to electronic devices based on non-toxic quantum dots include printable circuits, flexible displays, lab-on-a-chip diagnostics, wearable devices, medical testing, smart im... » read more

IoT Cybersecurity Improvement Act of 2020
By Technical Paper Link - 09 Jan, 2021 - Comments: 0

The "IoT Cybersecurity Improvement Act of 2020" became a U.S. law on 12/4/2020.   The legislation was passed by unanimous consent by the Senate and the House of Representatives. Congress.Gov states: "This bill requires the National Institute of Standards and Technology (NIST) and the Office of Management and Budget (OMB) to take specified steps to increase cybersecurity for Internet of ... » read more

Pressure-induced Anderson-Mott transition in elemental tellurium
By Technical Paper Link - 07 Jan, 2021 - Comments: 0

Oliveira, J.F., Fontes, M.B., Moutinho, M. et al. Pressure-induced Anderson-Mott transition in elemental tellurium. Commun Mater 2, 1 (2021). https://doi.org/10.1038/s43246-020-00110-1 Abstract: "Elemental tellurium is a small band-gap semiconductor, which is always p-doped due to the natural occurrence of vacancies. Its chiral non-centrosymmetric structure, characterized by helical chains ... » read more

Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-Chip Power Grid Network
By Technical Paper Link - 31 Dec, 2020 - Comments: 0

Abstract "With the advancement of technology nodes, Electromigration (EM) signoff has become increasingly difficult, which requires a considerable amount of time for an incremental change in the power grid (PG) network design in a chip. The traditional Black’s empirical equation and Blech’s criterion are still used for EM assessment, which is a time-consuming process. In this article, for ... » read more

PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning
By Technical Paper Link - 31 Dec, 2020 - Comments: 0

Academic research paper from Dept. of CSE, IIT Guwahatim, India. Abstract: "With the increase in the complexity of chip designs, VLSI physical design has become a time-consuming task, which is an iterative design process. Power planning is that part of the floorplanning in VLSI physical design where power grid networks are designed in order to provide adequate power to all the underlying ... » read more

The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes
By Technical Paper Link - 31 Dec, 2020 - Comments: 0

Abstract: "Logic locking has been proposed as an obfuscation technique to protect outsourced IC designs from IP piracy by untrusted entities in the design and fabrication process. In this case, the netlist is locked by adding extra key-gates, and will be unlocked only if a correct key is applied to the key-gates. The key is assumed to be written into a non-volatile memory after the fabricati... » read more

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