category: Technical Papers

category: Auto, Security & Edge AI

Multimodal LLM Assistant for Chip Physical Design (National Taiwan Univ., UCLA, NVIDIA)
By Technical Paper Link - 28 Oct, 2025 - Comments: 0

A new technical paper titled "Multimodal Chip Physical Design Engineer Assistant" was published by researchers at National Taiwan University, University of California, Los Angeles and NVIDIA Research. Abstract "Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving ro... » read more

Six-Stack Vertically Integrated Hybrid Platform For Large Area Electronics (KAUST, Imperial College Et Al.)
By Technical Paper Link - 22 Oct, 2025 - Comments: 0

A new technical paper titled "Three-dimensional integrated hybrid complementary circuits for large-area electronics" was published by researchers at KAUST, Imperial College London and the University of Manchester. Abstract "The development of low-power computing sectors requires compact, power-efficient and high-performance integrated circuits. Hybrid technology that combines n-type metal o... » read more

Thermal Simulation And Optimization in 3D-IC Design (Intel, UCSB, Cadence)
By Technical Paper Link - 22 Oct, 2025 - Comments: 0

A new technical paper titled "DeepOHeat-v1: Efficient Operator Learning for Fast and Trustworthy Thermal Simulation and Optimization in 3D-IC Design" was published by researchers at Intel Corporation, University of California, Santa Barbara and Cadence. Abstract "Thermal analysis is crucial in 3D-IC design due to increased power density and complex heat dissipation paths. Although operator ... » read more

Photonics as a Carbon-Sustainable Solution for Next-Gen AI Hardware (Boston Univ., NY CREATES, Lightmatter, Cornell Tech)
By Technical Paper Link - 21 Oct, 2025 - Comments: 0

A new technical paper titled "Photonics for sustainable AI" was published by researchers at Boston University, NY CREATES, Lightmatter and Cornell Tech. Abstract "The rising computational demands of Artificial Intelligence (AI) are driving a rapid surge in carbon emissions from the Information and Communications Technology (ICT) sector. Traditional CMOS-based computing is reaching its scali... » read more

Implementing Power Dynamic Response For Greener AI Data Centers (Univ. of Cambridge, Nyobolt, Nanyang Tech)
By Technical Paper Link - 21 Oct, 2025 - Comments: 0

A new technical paper titled "Improving AI Efficiency in Data Centres by Power Dynamic Response" was published by researchers at University of Cambridge, Nyobolt Limited and Nanyang Technological University. Abstract "The steady growth of artificial intelligence (AI) has accelerated in the recent years, facilitated by the development of sophisticated models such as large language models and... » read more

Modulation of the Inner Gate Length in MFMIS NSFETs To Achieve Big Gains in Memory Window (Samsung, Seoul National Univ.)
By Technical Paper Link - 21 Oct, 2025 - Comments: 0

A new technical paper titled "Inner Gate Length Modulation of MFMIS Nanosheet FET Memory for Advanced Technology Nodes" was published by researchers at Samsung and Seoul National University. Abstract "This work proposes a new way of lowering the area ratio (AR) between the ferroelectric and metal-oxide-semiconductor (MOS) regions of metal-ferroelectric-metal-insulator-semiconductor (MFMIS) ... » read more

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)
By Technical Paper Link - 20 Oct, 2025 - Comments: 0

A new technical paper titled "ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems" was published by researchers at ETH Zurich and CISPA. Abstract "We experimentally demonstrate a new widespread read disturbance phenomenon, ColumnDisturb, in real commodity DRAM chips. By repeatedly opening or keeping a DRAM row (aggressor row) ope... » read more

Microarchitectural Defense Strategy Against EM Side-Channel Attacks (Northeastern Univ., Binghamton Univ.)
By Technical Paper Link - 20 Oct, 2025 - Comments: 0

A new technical paper titled "ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors" was published by researchers at Northeastern University and Binghamton University. Abstract "The run-time electromagnetic (EM) emanation of microprocessors presents a side-channel that leaks the confidentiality of the applications running on them. Ma... » read more

3D Stacked HBM and Accelerators for LLMs: Heat Management and PDN (Georgia Tech, SK Hynix)
By Technical Paper Link - 17 Oct, 2025 - Comments: 0

A new technical paper titled "3D Stacked HBM and Compute Accelerators for LLM: Optimizing Thermal Management and Power Delivery Efficiency" was published by a researcher from Georgia Institute of Technology and SK Hynix. Abstract "Advanced packaging is becoming essential for designing hardware accelerators for large language models (LLMs). Different architectures such as 2.5D integration of... » read more

Beyond BPD: Backside Clock and Signal Routing for Sub-3nm (UT Austin, Intel)
By Technical Paper Link - 17 Oct, 2025 - Comments: 0

A new technical paper titled "Beyond Backside Power: Backside Signal Routing as Technology Booster for Standard Cell Scaling" was published by researchers from University of Texas at Austin and Intel. Abstract "Advances in process technology enabling backside metals and contacts offer new Design-Technology Co-Optimization (DTCO) opportunities to further enhance power, performance, and area ... » read more

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