category: Top Stories

category: Auto, Security & Edge AI

Field Solvers To The Rescue
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Pallab Chatterjee Field solvers have always been part of the Parasitic Extraction (PEX) world, but due to their long run times and complexity in configuration, their role was relegated to the setup/reference table generation for the pattern based 1-D and 2-D RC extraction tools. That’s about to change. Mentor, in combination with STMicroelectronics, one of it customers, said that at ... » read more

Rounding Up Design Corners
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Pallab Chatterjee With advanced process development occupying the 32nm to 22nm corridor, production SoC and ASIC designs are being built at the 180nm to 45nm nodes. In these processes, the designer has to contend with cross-wafer variation and non-correlated design corners, as well as multiple operation states. This is referred to as multi-corner multi-mode (MCMM) and variation analysis. ... » read more

Integrated IP Goes Vertical
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Ed Sperling The consolidation of intellectual property from small developers to large players with integrated IP blocks is accelerating. Large IP companies are now developing integrated suites that are pre-tested for specific vertical markets, and new companies are sprouting up to make it easier to put even broader collections of IP together in meaningful ways. It’s difficult to te... » read more

Emulation 2010
By Ann Mutschler - 25 Mar, 2010 - Comments: 0

By Ann Steffora Mutschler In an industry that was once fraught with patent infringement lawsuits, hostile takeovers and other exciting corporate warfare, the hardware-assisted emulation market has quieted down considerably. That doesn’t mean it has lost its luster, though. It still plays an integral, if not ever-increasing and expanding, role in the verification efforts of most semiconductor... » read more

Slow Adoption for ESL
By Brian Fuller - 25 Mar, 2010 - Comments: 0

By Brian Fuller It’s been more than a decade since electronic system level (ESL) abstraction started to gain traction in EDA. It’s been more than a few years since the industry began to plan for the day when the benefits of embracing C-language approaches to design description and validation would find designers churning out massively complex and profitable designs while sitting in lawn ch... » read more

Stop Texting Me
By Ed Sperling - 25 Feb, 2010 - Comments: 0

By Brian Fuller It was a simple request for a story: “You play around with this social-media stuff: Is it having an impact within engineering organizations?” My first thought was “social” and “engineer” should not be in the same sentence. Someone recently told me a story about trying—through Twitter no less—to set up a face-to-face meeting with an engineer at a live event.... » read more

Mind The Gap
By Ed Sperling - 25 Feb, 2010 - Comments: 0

By Ed Sperling Throughout system-level design there are gaps. High-level modeling doesn’t connect directly to RTL code. Synthesis and high-level synthesis remain worlds apart. There are even gaps in the expertise, from the people who handcraft RTL to those who take it for granted. Some of these gaps will get closed over time. Others will never be closed. In same cases it doesn’t matter.... » read more

Your Light Bulb Is Calling
By Ed Sperling - 25 Feb, 2010 - Comments: 0

By Pallab Chatterjee The mobility that is best associated with “smart phone” functionality is making its way into most other electronic systems. At ISSCC and even the Strategies in Light conference, systems and products were being shown featuring standard RF interfaces. The RF is being made available as standalone die for multi-die and 3D packaging, as well as in SoC IP blocks. The func... » read more

Make vs. Buy
By Ann Mutschler - 25 Feb, 2010 - Comments: 0

By Ann Steffora Mutschler The age-old question of whether to make or buy is time immemorial, and is particularly true for the cyclical semiconductor industry. At the end of the day, the answer comes down to how the decision maker feels about having or losing control. Fifteen years ago, whether to make or buy something—be it the design, libraries, memory, implementation, verification, te... » read more

Rethinking Test
By Ann Mutschler - 11 Feb, 2010 - Comments: 0

By Ann Steffora Mutschler The responsibility of semiconductor test has long sat solely with the test engineer as the chip designer focused on the functionality of the device. However, particularly in low-power designs, when the device is being tested, much higher power levels are applied than normal functional operation – sometimes causing the device to fail. This ‘false failure’ c... » read more

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