Backside Power Delivery Nears Production


Backside power delivery is being called a game changer — a breakthrough technology and the next great enabler in CMOS scaling. It promises significant PPA advances, including faster switching, lower voltage droop, and reduced power supply noise. And it is poised to deliver these benefits below the 2nm node, despite a substantial disruption in front-end processes from lithography pattern di... » read more

Packaging With Fewer People And Better Results


Advanced packaging has evolved far beyond the simple stacking of dies and connecting of interposers. Once a passive conduit between silicon and the outside world, it has become an active component of overall device performance. In today’s multi-die assemblies, the assembly and packaging lines are expected to maintain signal integrity at multi-gigahertz frequencies, manage heat in verticall... » read more

AI Agents Need Goals


Experts At The Table: Definitions and goals matter when it comes to using AI effectively, and it has to be tightly reined in to be effective. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, including Johannes Stahl, senior director of product line management for the Systems Design Group at Synopsys; Michael Young, director of product marketing for ... » read more

Advanced Packaging Fundamentals for Semiconductor Engineers: eBook


Advanced packaging is inevitable. Large systems companies and processing vendors already are working with various types of highly engineered packaging. The rest of the semiconductor industry will follow at some point, whether they're designing their own packages, developing the tools, processes, materials, and methodologies to create them, or developing components that will be used inside of th... » read more

Chiplet Tradeoffs And Limitations


The semiconductor industry is buzzing with the benefits of chiplets, including faster time to market, better performance, and lower power, but finding the correct balance between customization and standardization is proving to be more difficult than initially thought. For a commercial chiplet marketplace to really take off, it requires a much deeper understanding of how chiplets behave indiv... » read more

Implementing AI Activation Functions


Activation functions play a critical role in AI inference, helping to ferret out nonlinear behaviors in AI models. This makes them an integral part of any neural network, but nonlinear functions can be fussy to build in silicon. Is it better to have a CPU calculate them? Should hardware function units be laid down to execute them? Or would a lookup table (LUT) suffice? Most architectures inc... » read more

3D-IC Ecosystem Starts To Take Form


The adoption of chiplets is inevitable, but exactly when a mass migration toward this design approach will begin is yet to be determined. Nevertheless, some of the biggest technological and business-related barriers are being addressed. And while a chiplet-based design remains beyond the economic reach of many companies today, that is starting to change. Early signs of an emerging ecosystem ... » read more

Why Thin Film Measurements Matter


Semiconductor devices are becoming thinner and more complex, making thin deposited films even harder to measure and control. With 3nm node devices in production and 2nm nodes ramping toward first-silicon, the importance of precise film measurement is only growing in significance as fabs seek to maintain the performance and reliability of leading-edge devices. Whether it’s the read and writ... » read more

Nearly Invisible: Defect Detection Below 5nm


Detecting sub-5nm defects creates huge challenges for chipmakers, challenges that have a direct impact on yield, reliability, and profitability. In addition to being smaller and harder to detect, defects are often hidden beneath intricate device structures and packaging schemes. Moreover, traditional optical and electrical probing methods, trusted for decades, are proving inadequate against ... » read more

Hunting For Macro Defects


Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

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