Wearable Connectivity, AI Enable New Use Cases


The sensing and processing technology used in smart phones, watches, and rings is starting to be being deployed in a wide variety of wearable devices, ranging from those that fill the gap between sports and med tech, to haptic devices to assist the visually impaired and AR/VR glasses. Emerging applications include payment, building, and factory wearables. Most of these devices process signal... » read more

Automakers Grapple With Fundamental Tech Changes


Automotive OEMs are wrestling with a stack of changes that affect every part of their business and technology, from threats of tariffs and shifting geopolitical alliances, to new vehicle architectures, tighter market windows, and a fundamental reordering of relationships and priorities between OEMs and their suppliers. There is no consistency to these developments or a best path to solving t... » read more

Verification Experts Vs. Generalists


Experts At The Table: As chips and systems become more complicated, more verification tasks get abstracted. So do we need more specialists who are experts in specific tasks, or do we need more generalists who know how to use the tools but don't necessarily have the depth of understanding? Or do we need some way to balance both? Semiconductor Engineering sat down with a panel of experts, includi... » read more

Challenges Grow For Medical ICs


Demand for medical ICs used inside and outside the body is growing rapidly, but unique manufacturing and functional requirements coupled with low volumes have turned this into a complex and extremely challenging market. Few semiconductor applications demand this level of precision, reliability, and long-term stability. Unlike consumer electronics, where failure might mean a reboot or chip re... » read more

Improving Verification Methodologies


Methodology improvements and automation are becoming pivotal for keeping pace with the growing complexity and breadth of the tasks assigned to verification teams, helping to compensate for lagging speed improvements in the tools. The problem with the tools is that many of them still run on single processor cores. Functional simulation, for example, cannot make use of an unlimited number of c... » read more

Lines Blurring Between Supercomputing And HPC


Supercomputers and high-performance computers are becoming increasingly difficult to differentiate due to the proliferation of AI, which is driving huge performance increases in commercial and scientific applications and raising similar challenges for both. While the goals of supercomputing and high-performance computing (HPC) have always been similar — blazing fast processing — the mark... » read more

Multi-Die Design Complicates Data Management


The continued unbundling of SoCs into multi-die packages is increasing the complexity of those designs and the amount of design data that needs to be managed, stored, sorted, and analyzed. Simulations and test runs are generating increasing amounts of information. That raises questions about which data needs to be saved and for how long. During the design process, engineers now must wrestle ... » read more

What Scares Chip Engineers About Generative AI


Experts At The Table: LLMs and other generative AI programs are a long way away from being able to design entire chips on their own from scratch, but the emergence of the tech has still raised some genuine concerns. Semiconductor Engineering sat down with a panel of experts, which included Rod Metcalfe, product management group director at Cadence; Syrus Ziai, vice-president of engineering at E... » read more

Linear Pluggable Optics Save Energy In Data Centers


Linear pluggable optics (LPO) is garnering more attention as a way to quickly and efficiently move data in and out of server racks, but a lack of standards for connecting the optical modules is slowing adoption at a time when there is growing pressure to reduce power in data centers. LPO is the newest of two approaches to solving the power wall problem in data centers. Co-packaged optics (CP... » read more

Interconnects Approach Tipping Point


As leading devices move to next generation nanosheets for logic, their interconnections are getting squeezed past the point where they can deliver low resistance pathways. The 1nm (10Å) node will have 20nm pitch and larger metal lines, but the interconnect stack already consumes a third of device power and accounts for 75% of the chip's RC delay. Changing this dynamic requires a superior co... » read more

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