category: Top Stories

category: Auto, Security & Edge AI

Build It Faster
By Ed Sperling - 17 Nov, 2011 - Comments: 0

By Ed Sperling Hitting market windows with IC designs has always been a struggle, but the race to the finish line is becoming more critical—and much more difficult. The reason: Market windows themselves are shrinking. Products that used to stick around for years may now only last for months, replaced by newer versions that offer either better performance or lower power. In many cases, par... » read more

Five Important Changes That Will Affect Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ed Sperling So far most of the energy savings in SoCs have been achieved using two main approaches—turning off most of the chip most of the time, and changing the materials used to insulate against current leakage. Over the next few years, changes to designs will be more radical, encompass more pieces of a bigger system, and they will be orders of magnitude more effective. From a marke... » read more

EMI Cuts A Wide Swath
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler Electromagnetic interference (EMI) cuts across all application segments, whether it’s aerospace and defense and its various tangents, or in a handset, virtually touching a large majority of engineering teams today. The reason this issue affects so many engineering groups is because as modulation schemes become ever more complex they become even more sensitive to ... » read more

Energy Vs. Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler In the quest to optimize an SoC for both power and energy efficiency many variables come into play. Target application, use cases, processor choice and amount of memory among other specifications all figure into the optimization equation. As discussed in Part 1 of this series, energy and power are different entities and must be understood distinctly from each other... » read more

Power Gating And Power-Centric Programing
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Pallab Chatterjee SoC design has a number of techniques for power management. One of the more prevalent methods is to use power gating to turn on and off blocks based on applications being run, and mode controls. Power gating while being supported by the two major EDA power design flows, UPF and CPF, still has some implementation challenges. The flows have to make sure that the states of... » read more

The Next SoCs
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ed Sperling The number of changes that will hit the IC market over the next few years is almost staggering by any standard—past or present. In addition to the relentless pressure of Moore’s Law, there will be new materials, new structures, and new models for developing and packaging chips. System-Level Design asked executives from across the SoC ecosystem what will change, what’s d... » read more

Software Takes Control
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Pallab Chatterjee The idea that SoC and system design are a mix of hardware and software, in the form of both application software and firmware, has been in place for more than 60 years. But the emphasis is beginning to shift. The traditional approach has been to create the highest-performance circuit design, with some control options for flexibility, and then use this adaptable "platfor... » read more

Derivative Designs Demand Discipline
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ann Steffora Mutschler By and large most designs today are derivatives, meaning they don’t start from a blank slate. And while that gives engineering teams a starting point, it also can make adding new IP blocks or changes to the design problematic, with the potential for increased routing and timing issues along with considerable pain to back-end engineers and delays in chip schedules. ... » read more

VIP: Behind The Velvet Rope
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ann Steffora Mutschler Some years ago, as engineering teams began to incorporate more protocols into designs and as those protocols grew in sophistication and complexity in order to deliver additional performance, the verification task grew concurrently. At the same time, the design IP market was growing as complexity drove re-use of components, along with verification components—most com... » read more

Collaboration Grows
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ed Sperling A series of recent announcements by the Big Three EDA vendors and their well-known partners from across the disaggregated SoC ecosystem is lending new credence to the impact of collaboration. While IDMs such as Apple, Intel, Samsung and IBM continue to blaze their own trail, developing in-house tools, methodologies, processes and chips, fabless companies working with foundrie... » read more

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