Sk Hynix’s bets big on HBM; high-performing, low-power LLM without matrix multiplication; US Tech Hubs funding; Renesas-Altium deal passes key test; GF’s purchase; workforce drive; imec’s CMOS 2.0.
Early version due to U.S. holiday.
The U.S. government announced a new $504 million funding round for 12 Regional Technology and Innovation Hubs (Tech Hubs) for semiconductors, clean energy, biotechnology, AI, quantum computing, and more. Among the recipients:
In preparation for the “upcoming big wave,” Sk Hynix plans to spend nearly US$75 billion through 2028, with the bulk targeting high-bandwidth memory, AI data centers, and other AI-driven investments. “Preemptive and fundamental changes are needed for future preparation and ‘qualitative growth’, said Chairman Choi Tae-won in a company’s release.
The CHIPS funding continues with Rogue Valley Microdevices, inking a $6.7 million preliminary agreement to support the construction of the company’s 300mm MEMS and sensor foundry in Florida.
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Singapore-based Silicon Box picked Piedmont, Italy as the location for its previously announced US$3.6 billion advanced packaging facility.
Cadence partnered with GSME Oman, an affiliate of GS Microelectronics, to boost semiconductor industry growth in Oman and the Middle East.
SEMI formed a governing council for its Smart MedTech Initiative, which aims to lead the convergence of the semiconductor and medical industries as it shifts from a provider-centric model to personalized care via wearables and AI. Included among the 11 council members are Brewer Science, Rogue Valley Microdevices, and UC San Diego.
Google‘s 2024 Environmental Report said its greenhouse gas (GHG) emissions were 14.3 million tCO2e, which was 13% higher year-over-year and 48% higher compared to 2019, mainly due to increases in data center energy consumption and supply chain emissions. The company detailed a broad set of initiatives aimed at reducing that number and meeting aggressive sustainability goals.
Renesas and Altium received notification from the Committee on Foreign Investment in the United States that the investigation of the companies’ proposed merger is complete and there are no unresolved national security concerns.
GlobalFoundries acquired Tagore Technology’s Power GaN IP portfolio, a high-power density solution used in a wide range of power applications in automotive, IoT, and AI datacenters.
Altair plans to acquire Metrics Design Automation, a Canadian company that provides simulation as a service (SaaS).
Global server shipments are expected to rise 4% to 5% in Q3 2024, helped by demand for related components such as BMCs and new CPUs, according to TrendForce.
Battery electric vehicle (BEV) sales are predicted to reach 10 million in 2024 and attain equal market share with ICE vehicles by 2029, reports Counterpoint.
Semiconductor Engineering published its Automotive, Security & Pervasive Computing newsletter this week, featuring these top stories:
More reporting this week:
Natcast launched the NSTC Workforce Partner Alliance (WFPA) program to invest in programs addressing job and skill gaps across the chip industry ecosystem, with awards ranging from $0.5 – $2.0 million. Workforce solution providers should apply by July 26, 2024.
Purdue University inked a deal to help build the Dominican Republic‘s semiconductor industry.
KU Leuven and TU Eindhoven entered a semiconductor partnership in collaboration with imec and ASML. Key initiatives include shared training of jointly funded PhD students; a seed fund to explore research paths and attract research funding; joint master tracks and a possible a joint bachelor’s program; an annual Summer School for 100 students worldwide.
Mixel’s MIPI C-PHY/D-PHYCombo IP is now available on STMicroelectronics’ 40nm Low Power process technology (CMOS040LP). The MIPI C-PHY IP supports the v1.2 specification, and the MIPI D-PHY IP supports the MIPI D-PHY v2.1 specification.
Flex Logix boosted its embedded FPGA (eFPGA) AI accelerators with techniques that can reduce aggregate memory bandwidth by up to 16X and run new operators and activation functions at much higher performance.
Hardware security strategies are pushing much further left in the chip design flow as the number of vulnerabilities in complex designs and connected devices continues to grow, taking into account potential vulnerabilities in both hardware and software, as well as the integrity of an extended global supply chain.
Data security is becoming a bigger concern as chips are disaggregated into chiplets and various third-party IP blocks. There is no single solution that works for all designs, and no single tool or methodology that addresses everything in any design.
interface published an overview of the EU cybersecurity policy ecosystem, including legislation, policies, and actors.
The Cybersecurity and Infrastructure Security Agency (CISA) issued a number of alerts/advisories.
imec reported on CMOS 2.0, including its different approach to miniaturization and key enablers such as 3D interconnect and functional backside technologies.
Samsung Electronics and MIT researchers reported on the future of 2D semiconductors, including trends in channel materials, the integration of metal contacts and gate dielectrics, and insights into industrializing 2D semiconductor-based transistors for monolithic 3D integration.
UC Santa Cruz and others demonstrated a much lower energy LLM without matrix multiplication, while maintaining performance.
Find upcoming chip industry events here, including:
| Event | Date | Location |
|---|---|---|
| ITF Semicon USA (imec) | Jul 8 | San Francisco |
| SEMICON West | Jul 9 – 11 | San Francisco |
| Flash Memory Summit | Aug 6 – 8 | Santa Clara, CA |
| USENIX Security Symposium | Aug 14 – 16 | Philadelphia, PA |
| SPIE Optics + Photonics 2024 | Aug 18 – 24 | San Diego, CA |
| Hot Chips 2024 | Aug 25- 27 | Stanford University |
| Find All Upcoming Events Here | ||
Upcoming webinars are here, including topics such as chip-level electromagnetic crosstalk, ISO 26262, securing silicon and enhancing manufacturing test flows.
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