Chip Industry’s Technical Paper Roundup: Feb. 28

RISC-V on-chip power controller; chiplet placement; acceleration on CPUs; skip fault attacks on RISC-V; in-memory computing; scanning tunnel microscopy nanoscale; memristor security; thermal transistors; secure speculation for constant-time policy; BDD w/dynamic memory management.


New technical papers recently added to Semiconductor Engineering’s library:

Technical Paper Research Organizations
A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation ETH Zurich and University of Bologna
Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration National Yang Ming Chiao Tung University (Taiwan)
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs Georgia Tech and Intel Labs
CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V TU Munich and Fraunhofer Institute for Applied and Integrated Security (AISEC)
Experimental Assessment of Multilevel RRAM-Based Vector-Matrix Multiplication Operations for In-Memory Computing IHP (the Leibniz Institute for High Performance Microelectronics)
Externally-triggerable optical pump-probe
scanning tunneling microscopy with a time resolution of tens-picosecond
University of Tsukuba and UNISOKU Co.
Review of security techniques for memristor computing systems Israel Institute of Technology, Friedrich Schiller University Jena (Germany), and Leibniz Institute of Photonic Technology (IPHT)
EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation University of Bremen
ProSpeCT: Provably Secure Speculation for the Constant-Time Policy (Extended version) imec-DistriNet at KU Leuven, CEA, List, Université Paris Saclay and INRIA
Solid-State Electrochemical Thermal Transistors Hokkaido University, Pusan National University, and the University of Tokyo

If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate.

More Reading
Technical Paper Library home


Leave a Reply

(Note: This name will be displayed publicly)