Embedded World 2026: Bringing Edge AI Into The Real World


Embedded World 2026 made one thing clear: AI is no longer confined to the cloud—it’s moving decisively onto the device. Across our demos and conversations, a consistent theme emerged: intelligence is shifting closer to where data is created—into devices, environments, and the physical world. From smart homes to industrial systems and a wide range of emerging robotics applications, the ... » read more

AI’s Potential And Limitations In Chip Design


Experts at the Table: Semiconductor Engineering sat down to discuss the opportunities and challenges of using AI in chip design, with Thomas Andersen, vice president for AI & Machine Learning at Synopsys; Sridhar Boinapally, senior director of analog/mixed signal tools/flow at Intel; Alex Starr, corporate fellow at AMD; Stuart Oberman, vice president for GPU hardware engineering at Nvidia; ... » read more

Causal Inference for AMS Design (U. of Florida)


A new technical paper, "Causal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis," was published by the University of Florida. Abstract "Analog-mixed-signal (AMS) circuits are highly non-linear and operate on continuous real-world signals, making them far more difficult to model with data-driven AI than digital blocks. To close the gap between structured design data (dev... » read more

Why Co-Packaged Optics Should be Viewed as an Architectural Commitment (UW-Madison, MIT et al.)


A new technical paper, "3D optoelectronics and co-packaged optics: when solving the wrong problems stalls deployment," by the University of Wisconsin, MIT, and Invictus Innovation EV Technology. Abstract "The rapid growth of AI and accelerator-driven workloads is forcing a fundamental rethinking of optical interconnect architectures in datacenters. Co-packaged optics and three-dimensional... » read more

AI Workloads Are Turning The Data Center Network Into A Combined Memory And Storage Fabric


Recent industry trends, including the release of NVIDIA’s Rubin platform (developer.nvidia.com), point to a growing consensus that AI inference is reshaping data center architecture in a fundamental way. As inference workloads become dominant, the data center network is no longer just a communication layer between servers. It is increasingly part of a distributed memory and storage hierarchy,... » read more

Shift Verification Left: AI Tools For Faster, Smarter Chip Design


Verification activities can consume up to 70% of an overall chip project's effort, underscoring the central challenge that verification poses in today's semiconductor development (Cadence SoC Verification report). The most time-consuming activities, debugging and coverage closure, require significant coordination between design and verification teams and largely dictate overall time-to-ma... » read more

AI Won’t Kill Verification IP, But It Will Redefine It


Key Takeaways AI will enhance, not replace, verification IP by automating test generation and debug. Verification IP’s core value will increasingly lie in trust, accountability, and system-level realism, especially as designs become more complex, multi-die, and security-sensitive. AI shifts verification bottlenecks from execution to specification quality, raising expectations for c... » read more

Scaling AI Infrastructure: Overcoming Interconnect Bottlenecks Via CPO And Heterogeneous Integration


The rapid evolution of Artificial Intelligence (AI) has surpassed the capabilities of traditional monolithic compute architectures. The industry is shifting toward a systemic approach, where large-scale distributed clusters of GPUs/AI accelerators function as a single, unified computational engine to support the next generation of trillion-parameter models. Co-packaged optics (CPO) offers s... » read more

Aligning The Semiconductor Value Chain In A Virtuous AI Cycle At SEMICON Korea 2026


By Samer Bahou and Jaegwan Shim As the global semiconductor industry enters a decisive new phase shaped by artificial intelligence, SEMICON Korea 2026 convened the ecosystem from February 11–13 in Seoul, bringing together the companies, technologies, and talent required to sustain momentum on both sides of the AI equation: using AI to transform semiconductor operations, and advancing sem... » read more

Memory For AI At The Edge


Inferencing at the edge has very different needs than training large language models or large-scale inferencing in AI data centers. Many edge devices run on a battery. They're price-sensitive, and they are constrained by the physical area of the device. As a result, the amount of memory that can be packed into these devices is also limited. Steve Woo, Rambus fellow and distinguished inventor, t... » read more

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