What’s Missing From Machine Learning


Machine learning is everywhere. It's being used to optimize complex chips, balance power and performance inside of data centers, program robots, and to keep expensive electronics updated and operating. What's less obvious, though, is there are no commercially available tools to validate, verify and debug these systems once machines evolve beyond the final specification. The expectation is th... » read more

Blog Review: Aug. 31


Mentor's Harry Foster presents the 2016 Wilson Research Group Functional Verification Study, beginning with trends in FPGA design and an investigation into the verification effort it takes. Synopsys' Viral Sharma warns that while AMBA AXI exclusive access may look simple at first glance, the possibility of different scenarios and combinations poses a challenge. Cadence's Paul McLellan loo... » read more

Cars, Security, And HW-SW Co-Design


Semiconductor Engineering sat down to discuss parallel hardware/software design with Johannes Stahl, director of product marketing, prototyping and FPGA, [getentity id="22035" e_name="Synopsys"]; [getperson id="11411" comment="Bill Neifert"], director of models technology, [getentity id="22186" comment="ARM"]; Hemant Kumar, director of ASIC design, Nvidia; and Scott Constable, senior member of ... » read more

Surprises At Hot Chips 2016


Who would have thought an Intel architect would be on stage talking about cutting pennies out of MCU prices? Or that Nvidia would be trumpeting an automotive SoC whose chief performance advantages come from the integration of ARM CPUs that can support up to eight virtual machines? Or that Samsung would be developing a quad-core mobile processor from scratch based on its own unique architecture?... » read more

New Ways To Scale Performance


Immense amounts of data are being collected today in areas such as meteorology, geology, astronomy, quantum physics, fluid dynamics, and pharmaceutical research. Exascale computing (the execution of a billion billion floating point operations, or exaFLOPs, per second) is the target that many HPC systems aspire to over the next 5 to 10 years. In addition, advances in data analytics and areas su... » read more

Can Analog And Digital Get Along Better?


How to bridge analog and digital is getting renewed attention as the amount of analog content that needs to be processed balloons with consumer and industrial IoT applications. Solving that problem isn’t going to be easy, though. To begin with, digital designers view designs in terms of voltages. Analog designers, in contrast, look at currents. “Unless you can analyze an [getkc id="37... » read more

Blog Review: Aug. 24


Cadence's Christine Young relates a talk by IEEE president-elect Karen Bartleson, who stresses the need for technologists and policy makers to work together to shape the future of the Internet. In his latest video, Mentor's Colin Walls muses about creeping elegance in embedded software development. Synopsys' Michael Posner considers whether USB Type-C should replace the 3.5mm headphone ja... » read more

Deeper Inside Intel


Mark Bohr, senior fellow and director of process architecture and integration at Intel, and Zane Ball, vice president in the Technology and Manufacturing Group at Intel and co-general manager of Intel Custom Foundry, sat down with Semiconductor Engineering to discuss the future directions of transistors, process technology, the foundry business and packaging. What follows are excerpts of those ... » read more

The Week In Review: Design


Tools Aldec uncorked its TySOM embedded development kit, which includes Riviera-PRO mixed-HDL language simulation for VHDL 2008/Verilog 2005, a Xilinx Zynq-based development board and pre-validated Ubuntu Embedded Host reference designs and tutorials. Mentor Graphics introduced the first phase of its new Xpedition PCB design flow with technologies for design and verification of rigid and ... » read more

Blog Review: Aug. 17


Mentor's Andrew Macleod listens in on the most pressing electrical engineering and embedded software challenges in the automotive industry today, in an IESF presentation by Paul Johnston. Many flash memory protocols have appeared, and Synopsys' Rahul Ramesh Chaudhari delves into ONFi in particular. Cadence's Paul McLellan digs into the challenges facing the development and roll out of 5G.... » read more

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