Blog Review: Nov. 27


Synopsys’ Brent Gregory is looking at real-world experiments to figure out which EDA software is better. Make sure to check out his stats. Cadence’s Brian Fuller interviews two Samsung engineers in a video about the image technology in smart phone cameras and just how far it’s progressed. Hint: Don’t forget to charge your phone on your next vacation. Mentor’s Colin Walls points ... » read more

Big Changes Rock Global Smartphone Market


BANGKOK — One of the many draws for Western travelers here in Thailand and throughout much of Asia, including China, is the availability of cheap consumer electronics. Unfortunately many of these electronic goods — little-known off-brands mimicking better-known counterparts, or white-label devices being passed off as name-brand products to unsuspecting consumers — typically are technologi... » read more

The Week In Review: System-Level Design


Synopsys rolled out new non-volatile memory IP that cuts power by 90% and reduces area in half. The company said it accomplished this feat with a single-bit read capability, which can drop read operation down to 0.9 volts and peak current to less than 10 microamps during erase and programming. The target of the ultra-low power IP is RFID and near-field computing ICs. Mentor Graphics posted p... » read more

The Week In Review: Manufacturing & Design


Intel is getting serious about the foundry business.  “Intel CEO Brian Krzanich is making some waves. This is not because Intel is becoming more market driven, but that Intel will open its foundry to ‘any’ company able to utilize the company's leading-edge technology. It’s very refreshing to see Intel make this move and could have important implications for the industry. Based on Intel... » read more

Verifying Cache Coherency Protocols With Verification IP


The use of on-chip cache memory helps design teams optimize multicore designs for both power and performance. While the use of hardware to implement cache coherency enables design teams to improve SoC performance, it adds significantly to verification complexity. The use of verification IP (VIP) enables engineers to validate such designs, although the VIP's effectiveness depends on its advanced... » read more

Blog Review: Nov. 20


Can you really heat your home office with just four candles? It all depends on where you put those candles, as Mentor’s Robin Bornoff shows in part one of this series. And make sure you check out the video, particularly if you’ve had a tough day. Synopsys’ Karen Bartleson interviews ST’s Oleg Logvinov on camera about the IoT, which may be the biggest change since the Industrial Revol... » read more

Collaborate Or Go Home


Technology is hard. It's no secret that it's more difficult than ever to keep devices shrinking while increasing performance. It's also old news that it is increasingly costly to be at the leading edge, as semiconductor production technology gets ever more complex — even as a maturing chip industry becomes ever more dependent on low-cost consumer devices. But it has made for some strang... » read more

ARMing Intel


For some time, the industry has kept a close eye on Intel’s fledging foundry business. The question is whether Intel will merely dabble in the foundry business or become a major player. The answer? It’s still too early to tell. Not long ago, Intel entered the foundry business and announced a smattering of small and niche-oriented customers, such as Achronix, Netronome and Tabula.  Micro... » read more

The Week In Review: System-Level Design


Si2’s OpenPDK rolled out its Open Process Specification 1.1, including elements necessary to automatically create a process design kit using any EDA vendor’s design flow. The standard uses formal grammar based on the XML Schema Definition. ARM won a deal with Rockchip, which is extending its license to a number of ARM processors as well as its GPU and interconnect technology. This marks ... » read more

ARM Cortex-A53, UPF & FD-SOI


The IEEE Standards Association Symposium on Electronic Design Automation (EDA) Interoperability was held on Oct. 24. I found the first session, Interoperability Challenges: Power Management in Silicon, with presentations by Erich Marschner of Mentor Graphics and Stuart Riches and Adnan Khan (both from ARM) to be particularly interesting. Earlier this year, the IEEE announced a new version of UP... » read more

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