tag: GlobalFoundries

1xnm DRAM Challenges
By Mark LaPedus - 18 Feb, 2016 - Comments: 3

At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

Consolidation Hits OSAT Biz
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

The outsourced semiconductor assembly and test (OSAT) industry is undergoing a new wave of acquisition activity that will dramatically reshape the packaging and test services markets. [getkc id="83" kc_name="OSATs"] have seen a considerable amount of consolidation over the years, but the industry needs a scorecard to keep track of the recent deals and the resulting fallout. One OSAT deal inv... » read more

Internet of FD-SOI Things?
By Katherine Derbyshire - 18 Feb, 2016 - Comments: 0

Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 12 Feb, 2016 - Comments: 0

SUNY Polytechnic Institute (SUNY Poly) and GlobalFoundries announced the establishment of a new Advanced Patterning and Productivity Center (APPC). The $500 million, 5-year program will accelerate the introduction of extreme ultraviolet (EUV) lithography technologies into manufacturing. The center is located at the Colleges of Nanoscale Science and Engineering (CNSE) in Albany, N.Y. -------... » read more

Fallout From Scaling
By Ed Sperling - 03 Feb, 2016 - Comments: 0

By Ed Sperling & Ann Steffora Mutschler Semiconductor scaling is becoming much more difficult and expensive at each new node, creating sharp divisions about what path to take next for which markets and applications. What used to be confined to one or two clear choices is now turning into a menu of items and possibilities, often with no clear guarantees for a successful outcome. Views ... » read more

Power/Performance Bits: Feb. 2
By Jesse Allen - 02 Feb, 2016 - Comments: 0

Single electron transistors A group coordinated by the Helmholtz-Zentrum Dresden-Rossendorf (HZDR) is setting out on a four year program to develop single electron transistors fully compatible with CMOS technology and capable of room temperature operation. The single electron transistor (SET) switches electricity by means of a single electron. The SET is based on a quantum dot (consisting... » read more

Upcoming Hurdles For The Semiconductor Industry
By Ann Mutschler - 01 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys-Apache; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 22 Jan, 2016 - Comments: 0

Samsung Electronics announced that it has begun producing the industry’s first 4-gigabyte DRAM package based on the second-generation High Bandwidth Memory (HBM2) interface. The 4GB HBM2 package is created by stacking a buffer die at the bottom and four 8-gigabit core dies on top. These are then vertically interconnected by TSV holes and microbumps. A single 8Gb HBM2 die contains over 5,000 T... » read more

Neuromorphic Chip Biz Heats Up
By Mark LaPedus - 21 Jan, 2016 - Comments: 0

It’s no secret that today’s computers are struggling to keep up with the enormous demands of data processing and bandwidth, and the whole electronics industry is searching for new ways to enable that. The traditional approach is to continue to push the limits of today’s systems and chips. Another way is to go down the non-traditional route, including an old idea that is generating stea... » read more

5nm Fab Challenges
By Mark LaPedus - 21 Jan, 2016 - Comments: 2

At a recent event, Intel presented a paper that generated sparks and fueled speculation regarding the future direction of the leading-edge IC industry. The company described a next-generation transistor called the nanowire FET, which is a finFET turned on its side with a gate wrapped around it. Intel’s nanowire FET, sometimes called a gate-all-around FET, is said to meet the device require... » read more

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