Building And Validating FreeRTOS-Based Virtual ECUs: A Comprehensive Approach


By Markus Stix and Stefan Pruisken For decades, the world of automotive software has been dominated by AUTOSAR Classic – a reliable but heavyweight standard. Recently, however, OEMs and suppliers are increasingly investigating lightweight alternatives like FreeRTOS. Even though FreeRTOS is not an equivalent replacement for AUTOSAR Classic, it brings significant value to the developers of... » read more

LLMs Add Safety Risks To Physical AI


Humanoid robots with artificial general intelligence are some years from entering our daily life, but application-specific robotics are already here. From Amazon’s fleet of fulfillment center robots to robotic surgical systems in operating rooms, search and rescue robo-dogs, autonomous drones, and last-mile delivery robots, all the way down to the humble Roomba vacuum cleaner, physical AI sys... » read more

Moving AI Workloads To The Edge


Experts At The Table: Semiconductor Engineering gathered a group of experts to discuss how some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy. The panel included Frank Ferro, group director in the Silicon Solutions Group at Cadence; Eduardo Montanez, vice president an... » read more

How Fast Can Germany Shift To Software-Defined Vehicles?


It's being called "China speed," defined by the accelerated rate at which software-defined vehicles can be designed, manufactured, and updated with new features. And nowhere is this hitting harder and forcing more profound changes than in Germany, Europe's leading automotive market. Rather than relying solely on customized electronic control units, SDVs use a combination of specialized and g... » read more

Securing Silicon From the Start – Modular IP Solutions for Long-Term Resilience


Security isn’t a feature; it’s the foundation for any device that stores data, connects, or makes decisions. This eBook explores how to build more secure, future-ready products from the ground up — with modular IP, expert guidance, and end-to-end solutions proven across billions of SoCs. Key takeaways: Design with security from the ground up. Don’t rely on patches — embed prot... » read more

Formal Verification’s Value Grows


Experts at the table: Semiconductor Engineering sat down to discuss why formal verification is becoming more important, with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens EDA. Wha... » read more

Blog Review: Nov. 5


Synopsys' Igor Markov points out how numerical simulation tools advance quantum computing R&D by capturing both quantum-mechanical behavior and classical electromagnetic effects so researchers can evaluate design alternatives before fabrication and gain insight into how devices operate under realistic conditions. Siemens' Stephen V. Chavez finds that impedance modeling and control are mi... » read more

The Next Big Thing


Sometimes, we spend so much time looking for the next big thing that we actually miss something even bigger. I have to admit I was guilty of this while employed by a large EDA company 20 years ago. I was one of those ESL people — Electronic System Level acolytes, with Gary Smith as our standard bearer. We wanted to do many things, including raising the level of abstraction for design and veri... » read more

Chip Industry Week in Review


San Francisco-based Substrate raised more than $100 million to build a vertically integrated foundry that uses particle accelerators to produce "the world's brightest beams, enabling a new method of advanced X-ray lithography." The company claims its technology is comparable to ASML's high NA EUV, and notes it can extend well beyond 2nm. ASML has not publicly commented. The Nexperia chip sho... » read more

Top Five Trends In RTL Signoff


By Suresh Babu Barla and Rimpy Chugh The “shift left” of the development cycle is critical for the huge, complex chips used in such applications as AI and high-performance computing (HPC). Identifying design issues at the netlist stage occurs far too late in the design development process. At this point, addressing such problems demands significant effort, primarily because most design-r... » read more

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