tag: Synopsys

The Week In Review: Manufacturing
By Mark LaPedus - 20 May, 2016 - Comments: 0

Chipmakers IC Insights released its top chip makers in terms of sales for the first quarter of 2016. The top-20 ranking includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and six fabless companies. Intel remained in the top spot, followed in order by Samsung and TSMC. The biggest movers in the ranking were made by the new Broadcom (Avago/Broadcom) and Nvidia. Broadcom jumped f... » read more

Bridging the IP Divide
By Brian Bailey - 18 May, 2016 - Comments: 1

IP reuse enabled greater efficiency in the creation of large, complex SoCs, but even after 20 years there are few tools to bridge the divide between the IP provider and the IP user. The problem is that there is an implicit fuzzy contract describing how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to... » read more

Blog Review: May 18
By Jesse Allen - 18 May, 2016 - Comments: 0

Lead-absorbing bots may be the future of cleaning up polluted industrial wastewater, in this week's top five tech picks from Ansys' Justin Nescott. Plus, the Hyperloop is getting closer, and two years of Curiosity. In his latest podcast, Synopsys' Robert Vamosi chats with Chris Clark about the current automotive security landscape and what gaps exist when it comes to standards. From an ED... » read more

The Week In Review: Design/IoT
By Jesse Allen - 13 May, 2016 - Comments: 0

Standards Si2 is launching a new project to develop a new power modeling standard, focusing on estimation of power consumption more easily and more accurately throughout the design process, especially during the earliest stages. The approved specification will be contributed to the IEEE P2416 Standards Working Group for industry-wide distribution. IP Synopsys extended automotive safety... » read more

IP Business Models In Flux
By Ann Mutschler - 12 May, 2016 - Comments: 0

EDA and IP suppliers are engaging with foundries earlier with each manufacturing process node, while those foundries are providing ever more optimized and tuned processes to their customers. As part of this, IP providers must port their IP offerings to the various foundries and processes, putting a squeeze on resources. That raises some difficult questions, such as how to prioritize their li... » read more

Is Low Power Coverage Achievable?
By Srikanth Jadcherla - 12 May, 2016 - Comments: 0

Back in 2005, yes, before the invention of the iPhone, I made a slide to educate users on what to cover in Low Power Verification. Using a simple 3 island test case, I illustrated that verification had to be done in 4 states of operation, with 8 transitions and 16 sequences to be verified. This is after pruning the theoretically possible set of 8 states for on/off voltage islands. More than ... » read more

Achieve Functional Safety And High Uptime Using TMR
By Synopsys - 11 May, 2016 - Comments: 0

A look at how to build reliable FPGA-based designs, employing triple modular redundancy. To read more, click here. » read more

Blog Review: May 11
By Jesse Allen - 11 May, 2016 - Comments: 0

Cadence's Christine Young presents two views on the challenges of teaching physical design and some creative approaches to get students involved in solving complex problems. In his latest video, Mentor's Colin Walls ponders the mysteries of the increment operator in C/C++ and how to use it most efficiently. Synopsys' Anand Shirahatti, Mohd Adil Khan, and Jamshed Alum look at two key featu... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 May, 2016 - Comments: 0

Standards The IEEE launched the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specific markets rather than creating the fastest general-purpose processing elements at the smallest process node. For more on the IRDS, check out Ed Sperling's analysis. Accellera's SystemC A... » read more

End Of Mixed Signal Engineering?
By Ed Sperling - 04 May, 2016 - Comments: 1

EDA companies are stepping back after years of trying to force engineers to combine analog and digital disciplines. Rather than emphasizing [getkc id="38" kc_name="mixed signal"] as a single expertise, they are building bridges and translation mechanisms between the two worlds. The moves cap more than a decade of trying to find optimal ways to pack [getkc id="37" kc_name="analog"] and digita... » read more

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