tag: ANSYS

On-Chip Power Distribution Modeling Becomes Essential Below 7nm
By Ann Mutschler - 16 Nov, 2022 - Comments: 0

Modeling power distribution in SoCs is becoming increasingly important at each new node and in 3D-ICs, where tolerances involving power are much tighter and any mistake can cause functional failures. At mature nodes, where there is more metal, power problems continue to be rare. But at advanced nodes, where chips are running at higher frequencies and still consuming the same or greater power... » read more

Blog Review: Nov. 16
By Jesse Allen - 16 Nov, 2022 - Comments: 0

Siemens EDA's Jake Wiltgen explains the difference between transient and permanent faults when designing to the ISO 26262 standard, including where they come from and key ways to protect against them. Synopsys' Vikas Gautam points to how the economics of designing large SoCs is driving chiplet-based designs and the need for die-to-die standards such as UCIe, along with the key protocol verif... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 11 Nov, 2022 - Comments: 0

U.S. President Joe Biden appears ready to increase pressure on Japan and the Netherlands to help block the flow of advanced chip technology to China, where it can be used to develop cutting-edge weapons. "You will see Japan and Netherlands follow our lead," U.S. Commerce Secretary Gina Raimondo told CNBC. Japan plans to budget ¥350 billion ($2.38 billion) in a research collaboration with th... » read more

Taking Power Much More Seriously
By Brian Bailey - 10 Nov, 2022 - Comments: 0

An increasing number of electronic systems are becoming limited by thermal issues, and the only way to solve them is by elevating energy consumption to a primary design concern rather than a last-minute optimization technique. The optimization of any system involves a complex balance of static and dynamic techniques. The goal is to achieve maximum functionality and performance in the smalles... » read more

Solving Thermal Coupling Issues In Complex Chips
By Ann Mutschler - 10 Nov, 2022 - Comments: 0

Rising chip and packaging complexity is causing a proportionate increase in thermal couplings, which can reduce performance, shorten the lifespan of chips, and impact overall reliability of chips and systems. Thermal coupling is essentially a junction between two devices, such as a chip and a package, or a transistor and a substrate, in which heat is transferred from one to the other. If not... » read more

An Update On 5G And Aircraft Safety
By Pete Gasperini - 10 Nov, 2022 - Comments: 0

The U.S. aircraft industry is in the final phases of adapting aircraft and airports to address concerns over potential 5G cellular signal interference of automated landing systems. The Federal Aviation Administration (FAA) has driven the process to determine the level of risk to aircraft and safeguard against problems for low-visibility approaches — such as during inclement weather — for ne... » read more

Balancing Power And Heat In Advanced Chip Designs
By Karen Heyman - 10 Nov, 2022 - Comments: 1

Power and heat use to be someone else's problem. That's no longer the case, and the issues are spreading as more designs migrate to more advanced process nodes and different types of advanced packaging. There are a number of reasons for this shift. To begin with, there are shrinking wire diameters, thinner dielectrics, and thinner substrates. The scaling of wires requires more energy to driv... » read more

Blog Review: Nov. 9
By Jesse Allen - 09 Nov, 2022 - Comments: 0

Cadence's Claire Ying finds that the latest update to CXL, which introduced memory-centric fabric architectures and expanded capabilities for improving scale and optimizing resource utilization, could change how some of the world’s largest data centers and fastest supercomputers are built. Synopsys' Gervais Fong and Morten Christiansen examine the latest updates in the USB 80Gbps specifica... » read more

Enabling Accurate Electronic-Photonic Co-Design with a Synergetic Workflow on GlobalFoundries Fotonix Platform
By Ansys - 09 Nov, 2022 - Comments: 0

Massive growth in research, development, and applications of CMOS-compatible integrated photonics in recent years, along with its expected potential for the years to come, has sparked an ever-increasing demand from designers for seamless and all-inclusive design automation solutions that can enable electronic-photonic co-design while being accurate and easy to use. Here, we demonstrate an end-t... » read more

Week In Review: Design, Low Power
By Marie C. Baca - 04 Nov, 2022 - Comments: 0

Earnings and Acquisitions Siemens will acquire Avery Design Systems, a simulation-independent verification IP supplier, in the first quarter of fiscal year 2023. The terms of the transaction were not disclosed. Siemens executives say the acquisition will “enhance Siemens’ offerings across mainstream verification IP segments, while further extending Siemens verification solutions into area... » read more

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