tag: Arteris

Thinking Bigger
By Kurt Shuler - 17 Nov, 2011 - Comments: 0

I am in Shanghai and Xi’an this week for the ICCAD event and numerous customer visits, and have had the opportunity to observe and reflect upon the drivers of change within our industry. Living in the United States, and specifically Silicon Valley, has given me a front-row seat to the technology business for well over a decade. But my first visit to mainland China has shown me how parochial a... » read more

Derivative Designs Demand Discipline
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ann Steffora Mutschler By and large most designs today are derivatives, meaning they don’t start from a blank slate. And while that gives engineering teams a starting point, it also can make adding new IP blocks or changes to the design problematic, with the potential for increased routing and timing issues along with considerable pain to back-end engineers and delays in chip schedules. ... » read more

A Message From Steve Jobs
By Kurt Shuler - 20 Oct, 2011 - Comments: 0

By Kurt Shuler “I wanted my kids to know me. I wasn’t always there for them, and I wanted them to know why and to understand what I did.” This is how Steve Jobs answered his biographer when asked why he agreed to cooperate in the writing of his biography. Jobs’ statement was a kick in the gut when I first read it, and still elicits a gnawing pain in me. It drove home the point th... » read more

MIPI LLI Or C2C?
By Kurt Shuler - 22 Sep, 2011 - Comments: 0

By Kurt Shuler Two new options for interchip connectivity are available today that enable sharing a DRAM memory between two chips for data and programs. These standards, called MIPI Low Latency Interface (MIPI LLI) and Chip-to-Chip (C2C), are primarily targeted at mobile phones, where a mobile phone’s modem usually requires its own discreet DRAM. With either C2C or MIPI LLI, the mobile phone... » read more

Wide I/O’s Impact On Memory
By Ed Sperling - 25 Aug, 2011 - Comments: 0

By Ann Steffora Mutschler Driven by the need to reduce power but increase bandwidth in smart phones and other mobile devices, system architects are grappling with new technologies to take system performance to the next level. Wide I/O, as well as some DDR technologies, are vying for center stage in tomorrow’s leading-edge mobile designs. “The big technological advancement that allows a ... » read more

Mainstreaming
By Kurt Shuler - 25 Aug, 2011 - Comments: 0

By Kurt Shuler Gartner analyst Jim Tully’s assessment that network on chip (NoC) technology will be “mainstream” in two to five years is an acknowledgement of the technical and commercial success NoC interconnect IP has had in the consumer electronics system on chip (SoC) market over the last couple of years. As reported by EE Times, Gartner’s latest “Hype Cycle for Semiconductors... » read more

Getting The Balance Right
By Ann Mutschler - 11 Aug, 2011 - Comments: 0

Defining the power architecture for a low-power design means striking a balance between the high-level abstraction and measurements made typically at RTL and below, but today that is easier said than done. “The balance is that at the high level of abstraction, the design choices you make have a big effect over power, yet your ability to measure them is incomplete until you get much further... » read more

Next Up: Touchless Screens
By Kurt Shuler - 28 Jul, 2011 - Comments: 0

By Kurt Shuler Gesture Recognition Qualcomm’s announcement this Monday that it has acquired assets from gesture recognition technology pioneer GestureTek makes it official: Gesture recognition based on video camera technology will be in phones sooner than we think. [caption id="attachment_7583" align="alignnone" width="716"] Source: TI and YouTube[/caption] Video-based gesture recognit... » read more

Virtual Prototyping Takes Off
By Ed Sperling - 30 Jun, 2011 - Comments: 0

By Ann Steffora Mutschler Skyrocketing software development costs, which for years have been “somebody else’s problem,” are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and eve... » read more

Our STBs Really Suck (Power)
By Kurt Shuler - 29 Jun, 2011 - Comments: 0

By Kurt Shuler For all the work our industry does to implement sophisticated power management and conservation features in our chips and software, I was dismayed (and a little appalled) to read Saturday’s New York Times article, “Atop TV Sets, a Power Drain That Runs Nonstop.” Our industry’s dirty little secret is out, with help from the National Resources Defense Council (NRDC) and... » read more

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