Making Hybrid Bonding Better


Key Takeaways Fab processes are optimizing for cleanliness, planarity, and high bond quality. Nanotwinned copper and SiCN PVD enable lower anneal and deposition temperatures for HBM. A thin, protective layer helps preserve the Cu/dielectric during aggressive processes. The future of semiconductor manufacturing is no longer dependent just on shrinking features. Instead, chipm... » read more

Chip Industry Week in Review


Geopolitics Taiwan and the U.S. signed a trade agreement this week, with TSMC and other Taiwanese companies collectively pledging to directly invest at least $250B in investments in advanced semiconductor, energy and AI production and capacity in the U.S.  The agreement also included Taiwan providing another $250B in credit guarantees for additional IC supply chain expansions in the U.S., cap... » read more

Chip Industry Week in Review


Intel reported flat year-over year revenue for Q2, exceeding Wall Street's pessimistic expectations. In a message to employees, CEO Lip-Bu Tan said the company will: Cut about 15% of its staff, ending the year with about 75,000 employees, down from a high of nearly 132,000 in 2022; Scrap projects in Poland and Germany, consolidate other sites in central America and Southeast Asia, and s... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, Jesse Allen, and Liz Allan President Biden issued an executive order on the “Safe, Secure, and Trustworthy Development and Use of Artificial Intelligence.” It says entities need to report large-scale computing clusters and the total computing power available, including “any model that was trained using a quantity of computing power greater than 1,026 inte... » read more

Building Better Bridges In Advanced Packaging


The increasing challenges and rising cost of logic scaling, along with demands for an increasing number of features, are pushing more companies into advanced packaging. And while that opens up a slew of new options, it also is causing widespread confusion over what works best for different processes and technologies. At its core, advanced packaging depends on reliable interconnects, well-def... » read more

DAC/Semicon West Addresses Top Issues, Trends For Chips


The Design Automation Conference (DAC) 2023 and Semicon West returned in full force this week, drawing in more attendees and sponsor companies than since before the pandemic. At times, booth traffic was four to five deep, blocking aisles, and standing room only was common at presentations. Hot topics included generative AI and the underlying semiconductor technology, data security, reliabili... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has introduced another version of its 4nm process technology. The process, called N4X, is tailored for high-performance computing products. Recently, TSMC introduced another 4nm process, called N4P, which is an enhanced version of its 5nm technology. N4X is also an enhanced version of its 5nm technology. N4X, however, offers a performance boost of up to 15% over TSMC’s N5 pro... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs Intel plans to establish foundry capacity at its fab in Ireland. The company has also launched the so-called Intel Foundry Services Accelerator to help automotive chip designers transition from mature to advanced nodes. The company is setting up a new design team and offering both custom and industry-standard intellectual property (IP) to support the needs of automotive custom... » read more

Bumps Vs. Hybrid Bonding For Advanced Packaging


Advanced packaging continues to gain steam, but now customers must decide whether to design their next high-end packages using existing interconnect schemes or move to a next-generation, higher-density technology called copper hybrid bonding. The decision is far from simple, and in some cases both technologies may be used. Each technology adds new capabilities in next-generation advanced pac... » read more