tag: Cadence

Week In Review: Design, Low Power
By Jesse Allen - 29 Mar, 2019 - Comments: 0

ON Semiconductor will acquire Quantenna Communications for $24.50 per share in an all cash transaction, representing an equity value of approximately $1.07 billion and enterprise value of approximately $936 million. Quantenna, a maker of Wi-Fi chipsets, was founded in 2006 and went public in late 2016. Tools & IP Achronix completed testing and is now demonstrating the 112 Gbps SerDes th... » read more

Digital Twins For Hardware/Software Co-Development
By Frank Schirrmeister - 28 Mar, 2019 - Comments: 0

These days it seems like we could play business bingo when watching presentations at conferences, checking off the most keywords mentioned. Hitting the terms AI, ML, IoT, 5G, and edge computing all together almost guarantees your presentation to be a hit. In recent years, the term “digital twin” has gotten a lot of attention. Recent discussions with Brian Bailey and a paper I wrote for GOMA... » read more

Digital Twins Deciphered
By Brian Bailey - 28 Mar, 2019 - Comments: 0

Ever since Siemens acquired Mentor Graphics in 2016, a new phrase has become more common in the semiconductor industry – the digital twin. Exactly what that is, and what impact it will have on the semiconductor industry, is less clear. In fact, many in the industry are scratching their heads over the term. The initial reaction is that the industry has been creating what are now termed digi... » read more

Utilizing More Data To Improve Chip Design
By Ann Mutschler - 28 Mar, 2019 - Comments: 0

Just about every step of the IC tool flow generates some amount of data. But certain steps generate a mind-boggling amount of data, not all of which is of equal value. The challenge is figuring out what's important for which parts of the design flow. That determines what to extract and loop back to engineers, and when that needs to be done in order to improve the reliability of increasingly com... » read more

The Automation Of AI
By Brian Bailey - 28 Mar, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the role that EDA has in automating artificial intelligence and machine learning with Doug Letcher, president and CEO of Metrics; Daniel Hansson, CEO of Verifyter; Harry Foster, chief scientist verification for Mentor, a Siemens Business; Larry Melling, product management director for Cadence; Manish Pandey, Synopsys fellow; and Raik Brinkmann, CEO ... » read more

Delivering Superior Throughput For EDA Verification Workloads
By Cadence - 27 Mar, 2019 - Comments: 0

Perhaps no industry is more competitive than modern electronics manufacturing and chip design. As consumers, we take it for granted that electronic devices continue to get faster, cheaper, and more capable with each generation. From smart watches to industrial controls to electronic heart-rate monitors, electronics manufacturers are challenged to build smarter, more complex devices leveraging s... » read more

Blog Review: Mar. 27
By Jesse Allen - 27 Mar, 2019 - Comments: 0

Rambus' Steven Woo takes a look at the memory requirements of neural networks and why some companies are using on-chip memory while others are using HBM2 or GDDR6. Cadence's Lana Chan  observes growing momentum for NVMe and highlights some new features in the latest specification that are pushing mainstream adoption forward. Mentor's Matthew Ballance contends that when it comes to adopti... » read more

Data-Driven Verification Begins
By Ed Sperling - 27 Mar, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss data-driven verification with Yoshi Watanabe, senior software architect at Cadence; Hanan Moller, systems architect at UltraSoC; Mark Conklin, principal verification engineer at Arm; and Hao Chen, senior design engineer at Intel. What follows are excerpts of that conversation, which was conducted in front of a live audience at DVCon. (L-R) Yosh... » read more

Gaps In 5G Test
By Kevin Fogarty - 20 Mar, 2019 - Comments: 0

Add one more industry to the long list that analysts expect 5G technology to disrupt—test. While the initial versions of this wireless technology will be little more than a faster version of 4G, concern is growing about exactly how to test the second phase of this technology, which will be based upon millimeter wave. A number of fundamental problems need to be addressed. Among them: T... » read more

Blog Review: Mar. 20
By Jesse Allen - 20 Mar, 2019 - Comments: 0

Cadence's Paul McLellan argues that rapid improvements in the performance of general-purpose computing led to a lack of innovation in domain-specific architectures, but as scaling slows, they're entering a new golden age. In a video, Mentor's Colin Walls takes a look at the use of floating point in an embedded application and some of the pitfalls associated with it. Synopsys' Taylor Armer... » read more

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