tag: Cadence

Will Open-Source Work For Chips?
By Brian Bailey - 30 Jun, 2016 - Comments: 2

Open source is getting a second look by the semiconductor industry, driven by the high cost of design at complex nodes along with fragmentation in end markets, which increasingly means that one size or approach no longer fits all. The open source movement, as we know it today, started in the 1980s with the launch of the GNU project, which was about the time the electronic design automation (... » read more

Blog Review: June 29
By Jesse Allen - 29 Jun, 2016 - Comments: 0

Ansys' Justin Nescott checks out the world's first electric highway for trucking in this week's top five tech picks. Plus, some cool houses, Boston Dynamics' giraffe-bot, and a drum kit in a backpack. Applied's Matt Cogorno takes a look at the challenges facing etch methods as devices keep getting smaller. Synopsys' Apoorva Mathur digs into the energy efficient aspects of the MIPI M-PHY a... » read more

The Week in Review: IoT
By Jeff Dorsch - 24 Jun, 2016 - Comments: 0

Deals Samsung said Tuesday that it will invest about $1.2 billion in Internet of Things startups in the U.S. over the next four years. Investments will be made through the Samsung Global Innovation Center in Silicon Valley and through other Samsung units. Samsung is partnering with Intel to establish the National IoT Strategy Initiative, which will take in academic and industry members and wil... » read more

The Week In Review: Design
By Jesse Allen - 24 Jun, 2016 - Comments: 0

Tools & IP Synopsys uncorked PHY and Controller IP for PCI Express 4.0 architecture, which the company says reduces latency by up to 20% and area by 15% compared to the previous implementation. The IP supports lane margining to assess performance variation tolerance. PLDA announced a PCIe 4.0 development platform, and provides a PCIe 3.0-x8 (upstream) to PCIe 4.0-x4 (downstream) Integ... » read more

Advanced Packaging Options, Issues
By Ed Sperling - 23 Jun, 2016 - Comments: 0

Systems in package are heading for the mass market in applications that demand better performance and lower power. As they do, new options for cutting costs are being developed to broaden the appeal of this approach as an alternative to shrinking features. Cost has been one of the big deterrents for widespread adoption of [getkc id="82" kc_name="2.5D"]. Initially, the almost universal compla... » read more

Blog Review: June 22
By Jesse Allen - 22 Jun, 2016 - Comments: 0

A Lam Research writer investigates the challenges that lie ahead for interconnects and whether current technologies will find new life or be replaced by new strategies. There's a greater force powering Moore's Law, says Cadence's Paul McLellan, who points to the vast amount of transistors being used for memory. Mentor's Robert Bates considers the challenges of securing in-hospital network... » read more

Decoding The Brain
By Brian Bailey - 22 Jun, 2016 - Comments: 1

At the Design Automation Conference this year, Lou Scheffer, principal scientist for the Howard Hughes Medical Institute, gave a visionary talk entitled Learning from Life: Biologically Inspired Electronic Design. Scheffer is an IC design guy who came through Stanford and Caltech and worked for HP and [getentity id="22032" e_name="Cadence"] before switching to the medical field eight years a... » read more

Photonics Moves Closer To Chip
By Ed Sperling - 20 Jun, 2016 - Comments: 0

Silicon photonics is resurfacing after more than a decade in the shadows, driven by demands to move larger quantities of data faster, using extremely low power and with minimal heat. Until recently, much of the attention in photonics focused on moving data between servers and storage. Now there is growing interest at the PCB level and in heterogeneous multi-chip packages. Government, academi... » read more

CPU, GPU, or FPGA?
By Jeff Dorsch - 16 Jun, 2016 - Comments: 0

Nvidia’s new GeForce GTX 1080 gaming graphics card is a piece of work. Employing the company’s Pascal architecture and featuring chips made with a 16nm [getkc id="185" kc_name="finFET"] process, the GTX 1080’s GP104 graphics processing units boast 7.2 billion transistors, running at 1.6 GHz, and it can be overclocked to 1.733 GHz. The die size is 314 mm², 21% smaller than its GeForce ... » read more

Big Data Meets Chip Design
By Ann Mutschler - 16 Jun, 2016 - Comments: 0

The amount of data being handled in chip design is growing significantly at each new node, prompting chipmakers to begin using some of the same concepts, technologies and algorithms used in data centers at companies such as Google, Facebook and GE. While the total data sizes in chip design are still relatively small compared with cloud operations—terabytes per year versus petabytes and exa... » read more

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