tag: Cadence

Blog Review: Oct. 21
By Jesse Allen - 21 Oct, 2015 - Comments: 0

Ansys' Bill Vandermark goes back to the future in this week's top five picks. Plus, the star of the world's longest hoverboard flight gets an upgrade. Perhaps the person riding it will be wearing an ocean-cleaning bikini. Straight from MemCon 2015, Rambus' Aharon Etengoff brings us a keynote exploring the increasingly blurred lines between memory and storage, and how an alternative paradigm ... » read more

Will The Chip Work?
By Ed Sperling - 19 Oct, 2015 - Comments: 1

IP is getting better, but the challenges of integrating it are getting worse. As the number of IP blocks in SoCs increases at each new process node, so does the difficulty of making them all work together. In some cases, this can mean extra code and a slight performance hit on power and performance. In other cases, it may require more drastic measures, ranging from a re-spin to a new archite... » read more

The Week In Review: Design/IoT
By Jesse Allen - 16 Oct, 2015 - Comments: 0

M&A Continuing to seek economies of scale in the IP industry, VeriSilicon and Vivante are combining forces. "This transaction creates an extensive semiconductor IP portfolio that will now include GPU cores, vision image processors, digital signal processors, video codecs, mixed signal IP and foundry foundation IP," said Wayne Dai, VeriSilicon chairman, president and CEO. The merged compa... » read more

First Look: 5nm
By Ann Mutschler - 15 Oct, 2015 - Comments: 3

By the time the 5nm semiconductor manufacturing process node reaches mass production readiness, the hurdles and challenges will no longer be open for discussion. But as of this moment, some of them seem almost insurmountable, raising new questions about the continued viability of Moore's Law. There has been much written about the end of [getkc id="74" comment="Moore's Law"] for nearly two de... » read more

Analog Meets Power In Standards Groups
By Ann Mutschler - 15 Oct, 2015 - Comments: 4

While the topic of language [getkc id="13" comment="Standards"] might be cringe-worthy for some, there is some noteworthy work underway in this area—particularly where power and analog meet paths. There are four main standards here: Verilog-A and Verilog-AMS VHDL-AMS SystemC-AMS SystemVerilog-AMS SystemVerilog-AMS is the newcomer, and while the standard won't be available for ... » read more

Gaps In Performance, Power Coverage
By Brian Bailey - 15 Oct, 2015 - Comments: 0

The semiconductor industry always has used metrics to define progress, and in areas such as functional verification significant advances have been made. But so far, no effective metrics have been developed for power, performance, or other system-level concerns, which basically means that design teams have to run blind. On the plus side, the industry has migrated from the use of code coverage... » read more

Power, Standards And The IoT
By Ed Sperling - 15 Oct, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss power, standards and the IoT with Jerry Frenkil, director of open standards at [getentity id="22055" comment="Si2"]; Frank Schirrmeister, group director of product marketing of the System Development Suite at [getentity id="22032" e_name="Cadence"]; Randy Smith, vice president of marketing at [getentity id="22605" e_name="Sonics"]; and Vojin Zivojno... » read more

Is it Hot? Ask Joules
By Paul McLellan - 15 Oct, 2015 - Comments: 0

Over the last decade it has become clear that power reduction techniques involving different parts of the chips would become more important than they had historically. In 2G cell phones everything except the real-time clock could be turned off when the phone was not in use. Pre-smartphones, a phone was either making a call (or texting, gaming, etc.) or it was off. In fact, a cell phone can’t ... » read more

Blog Review: Oct. 14
By Jesse Allen - 14 Oct, 2015 - Comments: 1

Rambus' Aharon Etengoff explores how new optical interfaces are aiding the burgeoning field of optogenetics, which combines genetic targeting of specific neurons or proteins with optical technology to study living neural circuits. Anand Shirahatti, Divyang Mali, and Naveen G of Synopsys team up to explain three features that make the MIPI UniPro mobile interconnect stand out, along with the ... » read more

Abstraction: Necessary But Evil
By Brian Bailey - 14 Oct, 2015 - Comments: 1

Abstraction allows aspects of a design to be described in an executable form much earlier in the flow. But some abstractions are breaking down, and an increasing amount of lower-level information has to be brought upstream in order to provide estimates that are close enough to reality so informed decisions can be made. The value of abstractions in design cannot be overstated. High levels of ... » read more

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