tag: Cadence

Blog Review: Dec. 3
By Ed Sperling - 03 Dec, 2014 - Comments: 0

Mentor's Robin Bornoff zeroes in on some of the biggest and most frustrating causes of energy loss—the ones that have nothing to do with the intended task. In electronics, it's a question of how much power is consumed pushing around electrons and photons. Cadence's Richard Goering follows a panel discussion about whether we're really making progress in low-power design, where the challeng... » read more

A Faster, More Accurate Approach For System-Level Performance Verification Of A Wireless RFIC Design
By Cadence - 03 Dec, 2014 - Comments: 0

Wireless RFIC designs are growing more complex, increasing the challenge of verifying system-level performance. Designers are expected to be experts on a variety of ever-changing wireless standards and protocols. They must also contend with time-consuming manual simulation setup and post-processing of the simulation results. This paper discusses how an advanced simulation methodology, involving... » read more

Hybrid Verification: The Only Way Forward
By Brian Bailey - 01 Dec, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Blog Review: Nov. 26
By Ed Sperling - 26 Nov, 2014 - Comments: 0

Mentor's Nazita Saye has stumbled on a defibrillating drone that can rescuscitate victims well before emergency services arrive. That's a new one. ARM's Brad Nemire has found an interesting new Kickstarter device, too. It measures everything from heart beat to body posture with earlobe sensors. Cadence's Brian Fuller follows a speech by economist Austan Goolsbee, who is optimistic about t... » read more

Virtual Prototyping Takes Off
By Ed Sperling - 25 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss [getkc id="104" kc_name="virtual prototyping"] with Barry Spotts, senior core competency FAE for fabric and tools at [getentity id="22186" comment="ARM"]; Vasan Karighattam, senior director of architecture for SoC and SSW engineering at [getentity id="22664" e_name="Open-Silicon"]; Tom De Schutter, senior product marketing manager for Virtualizer S... » read more

The Internet Of Cores
By Brian Bailey - 20 Nov, 2014 - Comments: 0

Ever since the birth of the third-party [getkc id="43" comment="IP"] market, there has been a desire for plug-and-play compatibility between cores. Part of the value proposition of reuse is that a block has been used before, and has been verified and validated by having been implemented in silicon. By re-using the core, many of these tasks no longer land on the [getkc id="81" kc_name="SoC"] dev... » read more

Conflicting Needs For IoT Edge Designs
By Ed Sperling - 20 Nov, 2014 - Comments: 1

The mad rush has begun to hype the [getkc id="76" comment="Internet of Things"], but the path forward isn't quite as straightforward as the marketers would like it to be. ICs used at the edge of the IoT—the ones that gather information to be controlled by smart phones or tablets and transmitted to devices for processing and data analytics—need to be designed differently than the initial for... » read more

Making Models Interoperable
By Ann Mutschler - 20 Nov, 2014 - Comments: 0

As engineering teams raise the vision of their design to a higher level of abstraction, the use of behavioral modeling is growing. While not ubiquitous, the concepts are gelling, which at least is helping the industry discuss the technology more intelligently and determine where automation makes sense. One of the biggest concerns with behavioral modeling is what engineering teams want to do ... » read more

Measuring Verification Accuracy
By Ann Mutschler - 20 Nov, 2014 - Comments: 0

[getkc id="10" kc_name="Verification"] is the unbounded challenge that continues to confound engineering teams across the globe, who want to know when "enough" is "good enough" to proceed to tapeout. The answer is not straightforward, and it includes more variables than in the past, particularly around power. Harry Foster, chief verification scientist at [getentity id="22017" e_name="Mentor ... » read more

Hybrid Verification: The Only Way Forward
By Brian Bailey - 20 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

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