tag: Cadence

The Next Big Shift In Verification
By Frank Schirrmeister - 20 Nov, 2014 - Comments: 1

We are coming to the end of the year—have you started your Christmas shopping list yet? For us bloggers, it is time for predictions about what the next year will bring in EDA technology. Three core trends will shape 2015—even more closely connected verification engines, innovations in hardware-assisted development, and software as a driver for verification. All three core trends are r... » read more

How To Speed Signoff Extraction By 5X With Next-Generation Extraction Tool
By Cadence - 19 Nov, 2014 - Comments: 0

Parasitic extraction, particularly in the digital world, is becoming an increasingly time-consuming process. Not surprising, considering the explosion in interconnect corners, increasing design sizes and number of parasitics, and complex modeling features at advanced nodes, including FinFETs. This paper discusses capabilities you should have in order to overcome parasitic extraction challenges,... » read more

Photoresist Problems Ahead
By Ann Mutschler - 14 Nov, 2014 - Comments: 2

As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

The Week In Review: Design/IoT
By Ed Sperling - 14 Nov, 2014 - Comments: 0

An Intel study conducted by TNS showed that tech gadgets topped the holiday gift list this year, including tablets, laptops and smart phones. The study also found that 60% of Americans peeked at their holiday gifts as kids, and 25% still look. Deals Mentor Graphics added Macnica Americas as a distributor for its simulator, functional verification and PCB simulation and analysis tools. So... » read more

Blog Review: Nov. 12
By Ed Sperling - 12 Nov, 2014 - Comments: 0

ARM's Eoin McCann provides a primer to software-defined networking, which uses a higher level of abstraction to create a centralized controller. This is a new twist on networking—with a bit of deja vu thrown in. Mentor's Matthew Ballance points to a perfect storm for verification—shrinking features, more layers and more embedded processors. He has some tips for how to deal with all of t... » read more

Are Models Holding Back New Methodologies?
By Brian Bailey - 11 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirrmeister, group director... » read more

More Things Are Critical Systems
By Ed Sperling - 10 Nov, 2014 - Comments: 0

Defining a critical system used to be pretty obvious. It was something that could affect the health and safety of people, such as the chip inside a pacemaker or insulin pump, a car's braking system or an airplane's guidance system. But as more devices are connected together, that definition is changing and expanding. More devices are now considered critical, such as a connected baby monitor ... » read more

Industry Collaboration Starts
By Jesse Allen - 07 Nov, 2014 - Comments: 0

Last week was quite exciting for the Knowledge Center. We have started to receive our first vendor supplied pages along with obtaining permission to mine various documents for populating other pages. A big thank you for these early contributions. Several people also sent in photographs for inclusion on their personal pages as well as additional information or corrections. It all started whe... » read more

What’s Working For Power Verification
By Ann Mutschler - 07 Nov, 2014 - Comments: 2

Getting power verification right — or at least good enough — is the source of frustration for many design teams. Add to this the fact that there is no one right way to accomplish it just compounds the challenge. Fortunately, there are a number of options that are working to varying degrees, starting with static verification, according to Bernard Murphy, CTO of Atrenta. “Static verifica... » read more

Designing For Energy Efficiency
By Ed Sperling - 06 Nov, 2014 - Comments: 0

Swiss watchmakers have nothing to worry about for the moment. As top-name companies crowd into the wearable market with full-featured watches, limits on battery life and frequent charges undoubtedly will limit their popularity. Smart watches look cool or clunky, depending upon your perspective, but none of them lasts long enough between charges to be a serious market contender. That's certai... » read more

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