tag: EDA

The Future Of MEMS Design: Making MEMS Design More Like CMOS Design
By Christine Dufour - 20 Jul, 2017 - Comments: 0

MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process steps, stacks or technology platforms. To meet this need, we see the emergence of standard MEMS technology and design platforms similar to those used in CMOS design. The semiconductor industry and ... » read more

Dealing With System-Level Power
By Ann Mutschler - 17 Jul, 2017 - Comments: 1

Analyzing and managing power at the system level is becoming more difficult and more important—and slow to catch on. There are several reasons for this. First, design automation tools have lagged behind an understanding of what needs to be done. Second, modeling languages and standards are still in flux, and what exists today is considered inadequate. And third, while system-level power ha... » read more

Transistor Aging Intensifies At 10/7nm And Below
By Ann Mutschler - 13 Jul, 2017 - Comments: 0

Transistor aging and reliability are becoming much more troublesome for design teams at 10nm and below. Concepts like ‘infant mortality’ and 'bathtub curves' are not new to semiconductor design, but they largely dropped out of sight as methodologies and EDA tools improved. To get past infant mortality, a burn-in process would be done, particularly for memories. And for reliability, which... » read more

Is The IP Industry Healthy?
By Brian Bailey - 13 Jul, 2017 - Comments: 0

The semiconductor industry has been through many changes, each designed to reduce the total cost associated with the design and manufacture of chips. Twenty years ago, most companies had their own fabs and designed all of the circuitry on each chip. Today, only a handful of companies still own a fab and outsourcing design, in the form of intellectual property ([getkc id="43" kc_name="IP"]), has... » read more

Implementing High-Density-Advanced Packaging for OSATs And Foundries
By Mentor, a Siemens Business - 12 Jul, 2017 - Comments: 0

HDAP design and verification require cooperation and collaboration between design houses, OSATs, foundries, and EDA vendors. By using common tools that have the integration and functionality needed to operate in both the IC and packaging domains and by developing and deploying process optimized design-kits such as ADK’s and PDKs, OSATs, foundries, and their customers can achieve design, fabri... » read more

EDA, IP Growth Hits Double Digits
By Ed Sperling - 06 Jul, 2017 - Comments: 0

The cloud, advanced packaging and AI/machine learning pushed up EDA and IP revenue to the highest Q1 growth level since 2011. Revenue was up 10.5% year over year to $2.168 billion, compared with $1.962 billion in Q1 2016, according to just-released numbers from the Electronic System Design (ESD) Alliance. The four-quarter moving average increased by 10.6%. The two largest regions, the Americ... » read more

EDA Moves Out Of The Shadows
By Ed Sperling - 29 Jun, 2017 - Comments: 0

EDA has long harbored ambitions that are larger than a piece of silicon. The engineering challenges being solved on a nanometric scale are remarkably similar to ones being solved at a much higher level—architectural design, layout, validation, verification, debug, thermal mapping, and a lot more. The problem, at least until recently, is that it has been difficult to gain a foothold in larg... » read more

Machine Learning Meets IC Design
By Brian Bailey - 29 Jun, 2017 - Comments: 2

Machine Learning (ML) is one of the hot buzzwords these days, but even though EDA deals with big-data types of issues it has not made much progress incorporating ML techniques into EDA tools. Many EDA problems and solutions are statistical in nature, which would suggest a natural fit. So why is it so slow to adopt machine learning technology, while other technology areas such as vision recog... » read more

Hybrid Emulation
By Brian Bailey - 29 Jun, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for [getentity id="22032" e_name="Cadence"]; Russ Klein, program director for pre-silicon debug products at [getentity id="22017" e_name="Mentor, a Siemens Business"]; [getperson id="11027" comment="Phil Moorby"],... » read more

Monday At DAC
By Brian Bailey - 20 Jun, 2017 - Comments: 1

The 54th DAC got started today in a very steamy Austin. While we may be a maturing industry, there is certainly no indications that the people within the industry have given up or intend to take it easy. The event really got started late Sunday when Laurie Balch, chief analyst for Gary Smith EDA, delivered her message. She said that the focus is becoming the verticals. "This change in focus is ... » read more

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