tag: EDA

High-Level Gaps Emerge
By Ann Mutschler - 24 Jul, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the attributes of a high-level, front-end design flow, and why it is needed at present with Leah Clark, associate technical director for digital video technology at Broadcom; Jon McDonald, technical marketing engineer at Mentor Graphics; Phil Bishop, vice president of the System Level Design System & Verification Group at Cadence; and Bernard Mu... » read more

Planning For The Unexpected
By Tom De Schutter - 24 Jul, 2014 - Comments: 0

Last month we undertook a big family trip. My parents, my brother and his family came from Belgium to California, and together we embarked on a trip across the Northwest United States. Starting in Silicon Valley we drove via Lake Tahoe and Salt Lake City to Yellowstone. Afterward, we crossed over to Seattle and Portland to finish off the trip with visits to Crater Lake and Lassen Volcanic Natio... » read more

Software Design Moves Virtual Prototyping Into The Mainstream
By Jeff Scott - 24 Jul, 2014 - Comments: 1

With the high level of integration of CPUs, GPUs, and DSPs in today’s System-on-Chip (SoC) and ASIC devices, software is becoming a primary driver of system innovation. This, along with the increasing pressure to reduce system development time, makes it critical to get a working hardware prototype into the hands of the various software teams as quickly as possible. Traditional prototyping met... » read more

Reversing Course, With A Twist
By Brian Bailey - 24 Jul, 2014 - Comments: 1

Semiconductor Engineering is running an extended series of articles that examine the assertion that the end of Moore’s Law will have profound implications for the entire semiconductor, EDA and IP industries. Part one of this article, which focuses on the EDA industry, addressed the question about who was going to pay for future development of EDA tools for the latest production nodes. The ind... » read more

Executive Insight: Ajoy Bose
By Ed Sperling - 21 Jul, 2014 - Comments: 1

SE: What keeps you awake at night? Bose: What I worry about more than anything else is the need for us (at Atrenta) to show growth on an ongoing basis. A company’s challenges change with the lifecycle of that company. In the early days you worry about survival and trying to establish yourself in the industry. Fortunately, Atrenta is a bigger company today, so the nature of the concerns has c... » read more

Week 6: Still In Wow-Land
By Anne Cirkel - 18 Jul, 2014 - Comments: 0

While the conflicts around the world are overshadowing my complete euphoria, I have to admit that I’m still in Fussball wow-land right now. Germany won the World Cup! What an amazing goal from youngster Mario Goetze! Here is what the 22-year-old forward from Bayern-Muenchen had to say after the game: “Andre [Schurrle] put in a superb ball and I was able to control it on my chest, then someh... » read more

The Week In Review: Design
By Ed Sperling - 17 Jul, 2014 - Comments: 0

Tools Cadence unveiled two new tools. The first is a rapid prototyping platform that the company claims will shorten bring-up time by 70%, with 4X improvements in capacity, with IEEE 1801 support for low-power verification through its emulation platform. The second is a single and multi-corner custom/analog extraction tool, which it claims will improve performance by 5X. The tool has been cert... » read more

It’s Time to Bring GDS “Reality” Into Routing Closure
By Jean-Marie Brunet - 17 Jul, 2014 - Comments: 0

By Nancy Nguyen and Jean-Marie Brunet Imported cells, whether macros, standard cells, or intellectual property (IP), are a common element of today’s integrated circuit (IC) designs. Historically, when designers incorporate these cells into a design, they import them using an abstract format defined by a layout exchange format (LEF) file. This abstract view provides basic information about th... » read more

EDA Tools, IP Sales Up
By Ed Sperling - 15 Jul, 2014 - Comments: 0

EDA sales grew 4.6% in the first quarter, down slightly year-over-year as sales in Japan dragged down the rest of the market. Sales in Japan dropped 19% year over year as the country’s electronics industry struggles for footing against rivals in China and South Korea. North America and Europe grew 7% and 7.5% respectively, according to statistics provided by the EDA Consortium. Within thos... » read more

R-FPGA Security Risks
By Ernest Worthman - 07 Jul, 2014 - Comments: 0

Configurable chips have been around for a long time. Modern FPGAs, E/EEPROMS and other types of programmable memory have allowed us some flexibility in changing chip functionality in the field. But really, this is static reprogramming and requires a process and procedure. Moreover, it needs to done by knowledgeable programmers, either on site or remotely. But the fact remains that field re-prog... » read more

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