tag: EDA

Not Invented Here Syndrome
By Jon McDonald - 21 Aug, 2014 - Comments: 0

Recently I have made some choices on IP I needed to re-use and some I decided not to re-use. This got me thinking about the general topic of reuse in system-level design. Most will agree with a non-specific statement that reuse is a good thing, but the details tend to be a bit more ambiguous. Clouding the reuse question are occasional infections of NIH Syndrome (Not Invented Here), even if s... » read more

EDA Suffering Funding Crisis
By Brian Bailey - 21 Aug, 2014 - Comments: 5

The EDA industry has been built on venture funding ever since its inception in the early eighties and it is no secret that the big three have relied on a steady stream of startup companies to provide some of the new ideas, to test out new technologies and expand the industry. While there is a lot of research and development that goes on inside the large companies, most of this is related to ... » read more

More Problems Ahead
By Ed Sperling - 14 Aug, 2014 - Comments: 3

Semiconductor Engineering sat down to discuss future scaling problems with Lars Liebmann, a fellow at IBM; Adam Brand, managing director of transistor technology at Applied Materials; Karim Arabi, vice president of engineering at Qualcomm; and Srinivas Banna, a fellow for advanced technology architecture at GlobalFoundries. SE: We’re starting to hear talk about octuple patterning. We’ve ... » read more

Week 9: Look Out The Window
By Anne Cirkel - 08 Aug, 2014 - Comments: 1

When I grew up I was considered a rather difficult child. I couldn’t focus on a single task for long and sitting in the classroom, especially in elementary school, was sheer agony. I vividly remember one morning in third grade when, in the middle of a math test, I looked out the window and noticed a helicopter flying by. This was a notably more interesting fact than the numbers and equations ... » read more

Improving 2.5D Components
By Ed Sperling - 07 Aug, 2014 - Comments: 1

A lot of attention is being focused on improving designs at established, well-tested nodes where processes are mature, yields are high, and costs are under control. So what does this mean to stacking die? For 2.5D architectures, plenty. For 3D, probably not much. Here’s why: The advantage of 2.5D is that it can utilize dies created at whatever node makes sense. While the initial discuss... » read more

Established Nodes Getting New Attention
By Ed Sperling - 07 Aug, 2014 - Comments: 0

As the price of shrinking features increases below 28nm, there has been a corresponding push to create new designs at established nodes using everything from near-threshold computing to back biasing and mostly accurate analog sensors. The goals of power, performance and cost haven’t changed, but there is a growing realization among many chipmakers that the formula can be improved upon with... » read more

Tech Talk: Near Threshold Computing
By Ed Sperling - 07 Aug, 2014 - Comments: 1

ARM fellow Rob Aitken talks about what is NTC, why it has taken so long to catch on, and the enormous energy savings possible using this technique at established process nodes. [youtube vid=Ersdl81yTnM] » read more

Who Owns DAC?
By Anne Cirkel - 01 Aug, 2014 - Comments: 4

In June I was chatting with an editor unfamiliar with DAC and he was wondering who owns the conference. It’s a fair question and I recall thinking I’d blog about it as part of my effort to boost understanding of DAC. After all, my goal is to let you glimpse behind the curtain and that means touching on the prosaic though very important issue of ownership. First, the basics. DAC is owne... » read more

Improving The PPA Equation
By Ed Sperling - 24 Jul, 2014 - Comments: 0

The next generation of semiconductors may look very much like the existing generation. But like the old Porsche ads that required arrows to point to the improvements, because from the outside things basically looked the same, there should be plenty of impressive stuff inside. As the cost per transistor continues to rise at advanced nodes, the focus for most companies is no longer about shrin... » read more

EDA’s Hedge Plays
By Ed Sperling - 24 Jul, 2014 - Comments: 0

While 14/16nm process technologies with finFETs and double patterning have pushed complexity to new heights, the move to 10nm fundamentally will change a number of very basic elements of the design through manufacturing flow—and EDA vendors will be caught in the middle of having to make hard choices between foundries, processes, packaging approaches, and potentially which markets to serve. ... » read more

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