tag: EDA

Experts At The Table: Stacking The Deck
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ann Steffora Mutschler There is no doubt 3D stacking brings challenges not only from the design perspective, but also on the tool side. EDA vendors have been working for more than a few years to ready tools for stacked-die designs. How smooth the transition is, however, is a big question mark. Because the approach is new, not all the challenges are fully understood yet. And while most ED... » read more

Executive Briefing: The Next Five Years
By Ed Sperling - 12 Jul, 2012 - Comments: 0

Low-Power/High-Performance Engineering talks with Synopsys CEO Aart de Geus about what's changing in design, the role of hardware and software, and what comes next. [youtube vid=RxDGmKRBbPQ] » read more

Getting Paid For Efficiency
By Ed Sperling - 12 Jul, 2012 - Comments: 0

Over the past couple of years the electronics industry has woken up to the fact that saving energy and prolonging battery life is a very good thing. It can be marketed, used as a differentiator, and companies can charge a premium for battery-saving technology. In high-end devices, the incremental cost of adding even additional processors tends to get buried. In extremely price-sensitive mar... » read more

Experts At The Table: Pain Points
By Ed Sperling - 12 Jul, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: Where will the pain points be going forward? Kariat: 20nm is... » read more

Experts At The Table: Improving The Efficiency Of Software
By Ed Sperling - 29 Jun, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Design sat down to talk about how to write better software with Jan Rabaey, Donald O. Pederson Distinguished Professor at the University of California at Berkeley; Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Emily Shriver, research scientist at Intel; Alan Gibbons, principal engineer at Synopsys; and Dav... » read more

The Ins And Outs Of Directed Self-Assembly
By Ed Sperling - 26 Jun, 2012 - Comments: 0

By Mark LaPedus H.S. Phillip Wong, professor of electrical engineering at Stanford University and one of the leading experts on directed self-assembly (DSA) technology, sat down to discuss the future of this approach with Semiconductor Manufacturing & Design. With funding from the Semiconductor Research Corp. (SRC), Stanford is exploring contact-hole patterning and the design infrastructur... » read more

New Challenges, New Name
By Ed Sperling - 14 Jun, 2012 - Comments: 0

As you’ll notice today, we’ve changed our name from Low Power Engineering to Low-Power/High-Performance Engineering. We don’t take name changes lightly—we've been discussing this in depth with readers, sponsors, and researchers for the past six months. The almost universal conclusion is there is a big shift underway in the semiconductor industry today, and our new logo is a better refle... » read more

Experts At The Table: Improving The Efficiency Of Software
By Ed Sperling - 14 Jun, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Design sat down to talk about how to write better software with Jan Rabaey, Donald O. Pederson Distinguished Professor at the University of California at Berkeley; Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Emily Shriver, research scientist at Intel; Alan Gibbons, principal engineer at Synopsys; and Da... » read more

Are Hardware Developers From Mars And Software Developers From Jupiter?
By Frank Schirrmeister - 21 Feb, 2012 - Comments: 0

By Frank Schirrmeister In a recent discussion fellow Blogger Kurt Shuler, when talking about hardware and software designers, said something along the lines “Given languages like Verilog, both hardware and software developers really do software, for hardware designers the software is just getting fixed much sooner.” I intuitively agreed with him, but his comment inspired this post in which... » read more

ARM: Bulk ports directly to FD-SOI
By Various Writers - 17 Nov, 2011 - Comments: 0

In a recent ASN posting, ARM Fellow Jean-Luc Pelloie said that bulk logic designs can be ported directly to fully-depleted (FD)-SOI for high-performing, low-power mobile apps. ARM sees fully-depleted FD-SOI is a potential alternative to BULK 20nm.  Jean-Luc addressed the question of  what sort of impact a port from bulk FD-SOI would  have on the design flow. His answer is: very little. ... » read more

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