tag: finFETs

Rise Of The Old Fab
By Ed Sperling - 17 Dec, 2015 - Comments: 0

Growth in the [getkc id="260" comment="Internet of Everything"], along with the beginning of a shift toward systems in package, are creating buzz in a rather unlikely place—established and well-worn process nodes where equipment is scarce, semi-functional, and difficult to maintain. In the past, moving to the next node was a sign of progress, leaving behind the trailing edge of designs to ... » read more

Foundries Face Challenges in 2016
By Mark LaPedus - 17 Dec, 2015 - Comments: 2

Generally, 2015 has been a challenging year in the foundry business. For one thing, the foundry industry will register modest growth in 2015. In addition, the foundry customer base is consolidating. And on the leading edge, foundries took longer than expected to ramp up their 16nm/14nm finFET processes. So, after an eventful year in 2015, what’s in store for the foundry business in 2016? I... » read more

Reflections On 2015
By Brian Bailey - 10 Dec, 2015 - Comments: 0

It is easy to make predictions, but few people can make them with any degree of accuracy. Most of the time, those predictions are forgotten by the end of the year and there is no one to do a tally of who holds more credibility for next year. Not so with Semiconductor Engineering. We like to hold people's feet to the fire, but while the "Pants-On-Fire" meter may be applicable to politicians, we ... » read more

Top Articles For 2015 In SLD And LPHP
By Brian Bailey - 24 Nov, 2015 - Comments: 0

Knowing your readership is the first step in being able to serve them better, and judging by the traffic increases this year, we must be doing quite a few things right. We have now completed our second full year and the first full year for the Knowledge Center (KC). We are pleased with the way in which the two are playing together but there is still a lot of work ahead of and many holes to fill... » read more

Measuring FinFETs Will Get Harder
By Mark LaPedus - 19 Nov, 2015 - Comments: 2

The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more

Placing Bets On Future Technology
By Ed Sperling - 16 Nov, 2015 - Comments: 0

Marie Semeria, CEO of Leti, sat down with Semiconductor Engineering to talk about where the French research and technology organization is placing its future technology bets and what's behind those decisions. What follows are excerpts of that discussion. SE: It's becoming more difficult and expensive to shrink features, so where do we go next? Semeria: We see several areas that we believe... » read more

Micro-Architectural Exploration For Low Power Design
By Abhishek Ranjan - 12 Nov, 2015 - Comments: 0

By Abishek Ranjan, Saurabh Shrimal and Sanjiv Narayan The adoption of finFET technology has created a tectonic shift in the chip design landscape. In addition to better performance (within the same power envelope) and higher reliability, finFETs have significantly reduced the leakage power at smaller technology nodes. At the same time, the share of dynamic power dissipation continues to rise... » read more

Design, Test & Repair Methodology For FinFET-Based Memories
By Synopsys - 11 Nov, 2015 - Comments: 0

Like any IP block, memories need to be tested. But unlike many other IP blocks, memory test is not as simple as pass/fail. The advent of FinFET-based memories presents new memory test challenges. This white paper covers: The new design complexities, defect coverage and yield challenges presented by FinFET-based memories. How to synthesize test algorithms for detection and diagnosis of Fin... » read more

China’s Fab Tool Biz Heats Up
By Mark LaPedus - 28 Oct, 2015 - Comments: 0

For years, China has been a steady growth market for suppliers of semiconductor equipment. Internally, though, the country is comprised of trailing-edge fabs and IC-assembly houses, which means equipment vendors sell relatively mature tools and compete on price. That’s about to change, however. Today, the IC equipment business is heating up in China as the nation begins to upgrade and pour... » read more

Increasing Challenges At Advanced Nodes
By Ed Sperling - 22 Oct, 2015 - Comments: 1

Gary Patton, chief technology officer at GlobalFoundries, sat down with Semiconductor Engineering to talk about new materials, stacked die, how far FD-SOI can be extended, and new directions for interconnects and transistors. What follows are excerpts of that conversation. SE: Where do you see problems at future nodes? Patton: At the device level, we have to be able to pattern these thing... » read more

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