tag: GlobalFoundries

Next EUV Issue: Mask 3D Effects
By Mark LaPedus - 25 Apr, 2018 - Comments: 6

As extreme ultraviolet (EUV) lithography moves closer to production, the industry is paying more attention to a problematic phenomenon called mask 3D effects. Mask 3D effects involve the photomask for EUV. In simple terms, a chipmaker designs an IC, which is translated from a file format into a photomask. The mask is a master template for a given IC design. It is placed in a lithography scan... » read more

Auto Industry Driving Faster
By Mark Granger - 23 Apr, 2018 - Comments: 0

Automotive electronics used to be a lumbering, trailing-edge business. Not anymore. Today, powerful semiconductor technologies are driving the development of automotive features that once might have been seen as science fiction, such as advanced driver-assistance systems (ADAS) which are paving the way to self-driving cars. Overall, the market for semiconductors in automotive applications is... » read more

Design Rule Complexity Rising
By Ed Sperling - 19 Apr, 2018 - Comments: 0

Variation, edge placement error, and a variety of other issues at new process geometries are forcing chipmakers and EDA vendors to confront a growing volume of increasingly complex, and sometimes interconnected design rules to ensure chips are manufacturable. The number of rules has increased to the point where it's impossible to manually keep track of all of them, and that has led to new pr... » read more

Searching For EUV Defects
By Mark LaPedus - 19 Apr, 2018 - Comments: 1

Chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm, but several challenges need to be solved before this oft-delayed technology can be used in production. One lingering issue that is becoming more worrisome is how to find defects caused by [gettech id="31045" comment="EUV"] processes. These processes can cause random variations, also known as stochastic effects... » read more

More Lithography/Mask Challenges (Part 2)
By Mark LaPedus - 17 Apr, 2018 - Comments: 3

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 13 Apr, 2018 - Comments: 0

R&D Late last month, the U.S. Congress finalized the federal spending for the remainder of the fiscal year. This includes R&D spending as well. “There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11% and National Institutes of Standards & Technology (NIST) spend... » read more

Get Ready For Integrated Silicon Photonics
By Brian Bailey - 12 Apr, 2018 - Comments: 1

Long-haul communications and data centers are huge buyers of photonics components, and that is leading to rapid advances in the technology and opening new markets and opportunities. The industry has to adapt to meet the demands being placed on it and solve the bottlenecks in the design, development and fabrication of integrated silicon photonics. "Look at the networking bandwidth used across... » read more

Blog Review: April 4
By Jesse Allen - 04 Apr, 2018 - Comments: 0

Synopsys' Richard Solomon explains PCIe's upstream and downstream component naming and why understanding the perspective is key. Mentor's Cristian Filip dives into frequency domain analysis for high data rate SerDes links and the movement toward a simpler way of channel characterization. Cadence's Paul McLellan takes a look at the history of the RISC processors and the death of microcode ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 30 Mar, 2018 - Comments: 0

Chipmakers 3D NAND continues to gain steam, but is the industry headed towards a capacity glut in the overall NAND market? Time will tell. In any case, Toshiba is moving forward with its plans to invest in its Fab 6 facility in Japan. The fab will produce the company’s 96-layer 3D NAND devices. Then, Samsung plans to invest $7 billion to double the production capacity for NAND flash memor... » read more

Blog Review: March 28
By Jesse Allen - 28 Mar, 2018 - Comments: 0

Mentor's Joe Hupcey III and Jin Hou explain how to use the Open Verification Language (OVL) library of assertions to build an effective formal testbench. In a video, Cadence's Marc Greenberg discusses the benefits of moving non-volatile memory from the SSD to the DDR bus and possible new storage-class memories. Synopsys' Anders Nordstrom argues that security can no longer be ignored when ... » read more

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