Week In Review: Design, Low Power


M&A ANSYS will acquire Livermore Software Technology Corp. (LSTC), a provider of explicit dynamics and other advanced finite element analysis technology. Based in Livermore, CA, LSTC was founded in 1987 to commercialize the DYNA3D technology developed at the Lawrence Livermore National Laboratory. DYNA3D became the company's premier product LS-DYNA, a general purpose nonlinear finite eleme... » read more

Week in Review – IoT, Security, Autos


Products/Services Rambus entered an exclusive agreement to acquire the Silicon IP, Secure Protocols, and Provisioning business from Verimatrix, formerly known as Inside Secure. Financial terms were not revealed. The transaction is expected to close this year. Rambus will use the Verimatrix offerings in such demanding applications as artificial intelligence, automotive, the Internet of Things, ... » read more

Week In Review: Design, Low Power


Rambus will acquire the Silicon IP, Secure Protocols and Provisioning business from Verimatrix, formerly Inside Secure. The secure silicon IP and provisioning solutions from both companies will be integrated into a single portfolio of products and the embedded security teams from Verimatrix will join Rambus. “Integrating the Verimatrix embedded security team into Rambus, a recognized leader i... » read more

The Week In Review: Design


Tools Aldec released the latest version of its Riviera-PRO verification platform, adding QEMU Bridge to enable hardware/software co-simulation of designs intended to run on SoC FPGAs. Other features include improved performance when using code containing many inline randomized calls and up to 29% faster simulation speed of UVM. Pulsic added new features to its Unity Bus Planner for planning... » read more

The Week In Review: Design


IP Synopsys unveiled High Bandwidth Memory 2 (HBM2) IP. The package includes PHY, controller and verification IP and supports data rates up to 2400Mb/s, 20% faster than the JEDEC standard specification. The controller supports pseudo-channel operation in either lock step or memory interleaved mode, and the PHY offers four trained power management states and fast frequency switching. Cadence... » read more

The Week In Review: Design


IP ARM launched the Mali-C71 image signal processor (ISP), targeting ADAS SoCs. The ISP is capable of processing up to 4 real-time cameras and 16 camera streams with a single pipeline and provides advanced error detection with more than 300 dedicated fault detection circuits. Included is full reference software to control the ISP, sensor, auto white balance and auto exposure. Synopsys ext... » read more