Waiting For 5G Technology


For some time, carriers, equipment OEMs and chipmakers have been gearing up for the next-generation wireless standard called 5th generation mobile networks, or 5G. 5G is the follow-on to the current wireless standard known as 4G, or long-term evolution (LTE). It will enable data transmission rates of more than 10Gbps, or 100 times the throughput of LTE. But the big question is whether 5G wil... » read more

Executive Insight: Aki Fujimura


Aki Fujimura, chief executive of D2S, sat down with Semiconductor Engineering to look at the key issues in lithography and photomasks, as well as the changes taking place in the IC industry. What follows are excerpts of that conversation. SE: The semiconductor market is changing on several fronts. On one front, there is a wave of consolidation in the industry. And then there is a slowdown in... » read more

Photonics Moves Closer To Chip


Silicon photonics is resurfacing after more than a decade in the shadows, driven by demands to move larger quantities of data faster, using extremely low power and with minimal heat. Until recently, much of the attention in photonics focused on moving data between servers and storage. Now there is growing interest at the PCB level and in heterogeneous multi-chip packages. Government, academi... » read more

The Week In Review: Manufacturing


Chipmakers It’s been a difficult time for Intel. The chip giant recently announced a major layoff. It also ceased development on several cell-phone chip products. Intel hasn’t given up on Moore’s Law, but the nodes appear to be extending from 18 to 24 months or perhaps longer, at least at Intel. Here’s the latest: For 10nm production, Intel received the production fab tools in Ap... » read more

CPU, GPU, or FPGA?


Nvidia’s new GeForce GTX 1080 gaming graphics card is a piece of work. Employing the company’s Pascal architecture and featuring chips made with a 16nm [getkc id="185" kc_name="finFET"] process, the GTX 1080’s GP104 graphics processing units boast 7.2 billion transistors, running at 1.6 GHz, and it can be overclocked to 1.733 GHz. The die size is 314 mm², 21% smaller than its GeForce ... » read more

How To Build Systems In Package


The semiconductor industry is racing to define a series of road maps for semiconductors to succeed the one created by the ITRS, which will no longer be updated, including a brand new one focused on heterogeneous integration. The latest entry will establish technology targets for integration of heterogeneous multi-die devices and systems. It has the support of IEEE's Components, Packaging and... » read more

Menta Embeds FPGA Programmability


What constitutes a startup can be a matter of the market segment you are going after and the type of product that you are building. Within [getkc id="7" kc_name="EDA"], we often think of the lifetime of a company being just a few years between when an opportunity is identified, to a product being built and getting the first few customers and then getting gobbled up by one of the big three. But ... » read more

Plotting The Next Semiconductor Road Map


The semiconductor industry is retrenching around new technologies and markets as Moore's Law becomes harder to sustain and growth rates in smart phones continue to flatten. In the past, it was a sure bet that pushing to the next process node would provide improvements in power, performance and cost. But after 22nm, the economics change due to the need for multi-patterning and finFETs, and th... » read more

The Week In Review: IoT


Design Automation Conference ARM Holdings announced that its DesignStart initiative to enable easy creation of chip designs using ARM Cortex-M0 intellectual property now takes in electronic design automation tools and design environments offered by Cadence Design Systems and Mentor Graphics. “Simplifying access to EDA tools from Cadence and Mentor Graphics will further spur rapid innovation,... » read more

DAC Day Three: UVM, Machine Learning And DFT Come Together


The industry and users have a love/hate relationship with UVM. It has quickly risen to become the most used verification methodology and yet at the same time it is seen as being overly complex, unwieldy and difficult to learn. The third day of DAC gets started with breakfast with Accellera to discuss UVM and what we can expect to see in the next 5 years. The discussion was led by Tom Alsop, pri... » read more

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