tag: memory

LPDDR6: Not Just For Mobile Anymore
By Ed Sperling - 03 Nov, 2025 - Comments: 0

LPDDR memory has been almost synonymous with mobile devices, but starting with the new LPDDR6 specification released in July 2025 by JEDEC, it will begin showing up inside of data centers, as well, early next year. The key factors in various flavors of DRAM are bandwidth, capacity, and cost. HBM is the fastest, but it's also expensive, and it requires a 2.5D or 3.5D packaging approach. GDDR is ... » read more

Critical Factors For Storing Data In DRAM
By Ed Sperling - 27 Oct, 2025 - Comments: 0

DRAM is becoming more complicated to develop, and more difficult to manage inside AI data centers. In the past, latency, bandwidth, and capacity were the primary considerations. But as the amount of data that needs to be processed, moved, and stored continues to rise, a whole new set of factors is emerging. Steven Woo, fellow and distinguished inventor at Rambus, talks about latency under load,... » read more

Why In-Memory Computation Is So Important For Edge AI
By Katherine Derbyshire - 23 Oct, 2025 - Comments: 1

In popular media, “AI” usually means large language models running in expensive, power-hungry data centers. For many applications, though, smaller models running on local hardware are a much better fit. Autonomous vehicles need to respond in real-time, without data transmission delays. Medical and industrial applications often depend on sensitive data that cannot be shared with third par... » read more

Research Bits: Oct. 21
By Jesse Allen - 21 Oct, 2025 - Comments: 0

Direct patterning with UV cross-linking Researchers from Ulsan National Institute of Science and Technology (UNIST), Yonsei University, Sungkyunkwan University, University of Chemistry and Technology Prague, and Sogang University developed a technique that enables the direct patterning of 2D semiconductor materials onto substrates without the use of toxic solvents. The process involves disp... » read more

GDDR7 Tackles Massive-Context AI Inference
By Nidish Kamath - 16 Oct, 2025 - Comments: 0

The AI hardware landscape is evolving at breakneck speed, and memory technology is at the heart of this transformation. NVIDIA’s recent announcement of Rubin CPX, a new class of GPU purpose-built for massive-context inference, underscores this trend. Rubin CPX is designed to tackle workloads that require reasoning across millions of tokens. Use cases include long-form generative video, comple... » read more

Interconnect Innovations In High Bandwidth Memory: Part 2
By Damon Tsai - 14 Oct, 2025 - Comments: 0

By Damon Tsai, Woo Young Han, and Tim Kryman Interconnect technology in high bandwidth memory (HBM) is at a fork in the road. One direction leads to tried-and-true microbump technology, and the other leads to a compelling alternative, hybrid bonding. Both technologies are evolving to address the stringent requirements of next generation HBM in pursuit of increased I/O density supporting high... » read more

Research Bits: Sept. 30
By Jesse Allen - 30 Sep, 2025 - Comments: 0

Hybrid memory for edge training and inference Researchers from CEA-Leti, Université Grenoble Alpes, CEA-List, the French National Centre for Scientific Research (CNRS), the University of Bordeaux, Bordeaux INP, IMS France, Université Paris-Saclay, and the Center for Nanosciences and Nanotechnologies developed a hybrid memory system that combines the traits of ferroelectric capacitors (FeCAP)... » read more

LPDDR: A Versatile Memory Powering The Next Wave Of Mobile, Edge & Endpoint Computing
By Raj Uppala - 11 Sep, 2025 - Comments: 0

The world of computing is evolving at a breakneck pace. From smartphones and ultra-thin laptops to autonomous vehicles and edge AI devices, the demand for memory that balances performance, power efficiency, and compact form factors has never been greater. This shift is driven by a few undeniable trends, including the increased deployment of AI models across verticals at the edge and higher us... » read more

Interconnect Innovations In High Bandwidth Memory: Part 1
By Damon Tsai - 09 Sep, 2025 - Comments: 0

By Damon Tsai, Woo Young Han, and Tim Kryman The demand for high bandwidth memory (HBM) is accelerating across the semiconductor industry, driven by boundary-pushing artificial intelligence, high-performance computing, and advanced graphics. These technologies require access to vast datasets, which in turn increases the need for memory solutions that combine speed, density, and power efficie... » read more

Why 3D NAND Layers Bend (And How To Prevent It)
By Brett Lowe - 21 Aug, 2025 - Comments: 0

3D NAND flash memory is built by vertically stacking multiple alternating layers (tiers) of silicon nitride (SiN) and oxide (TEOS) on top of each other. A major challenge in producing multilayered 3D NAND devices is tier bending and tier collapse. These undesirable conditions can be caused by a combination of factors. Using the virtual Design of Experiment (DOE) capabilities in SEMulator... » read more

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