Bump technologies are being pushed beyond what was thought to be their physical and performance limits.
By Damon Tsai, Woo Young Han, and Tim Kryman
Interconnect technology in high bandwidth memory (HBM) is at a fork in the road. One direction leads to tried-and-true microbump technology, and the other leads to a compelling alternative, hybrid bonding. Both technologies are evolving to address the stringent requirements of next generation HBM in pursuit of increased I/O density supporting higher bandwidth and improved overall performance.
With data rates rising, the need for increased output contact pad density is needed. To address this challenge, bump technologies are being pushed beyond what was previously thought to be their physical and performance limits. As it stands today, some memory designers are innovating their way to bump sizes far below 10µm in high volume manufacturing. Be that as it may, scaling bump height to below 2μm will be challenging, leading some to explore hybrid bonding as an interconnect solution.
In our previous blog, Interconnect Innovations In High Bandwidth Memory: Part 1, we discussed the challenges of microbumps and hybrid bonding interconnect technologies in the manufacturing of HBM. This time, we will focus on process control solutions that, when integrated, tackle the biggest interconnect challenges facing next generation HBM. We will start with microbumps and then move on to hybrid bonding.
In the case of bump-based interconnects, the ability to measure Cu-to-Cu bump height down to 1.5μm will be key in allowing bump interconnects to remain a viable and scalable solution for next-generation HBM.
Fig. 1: a) Plating uniformity impacts coplanarity after reflow. Coherent laser technology overcomes roughness of the top surface, thereby overcoming the scattering noise that occurs when white light is used; b) wafer-to-wafer variation monitoring.
However, several of today’s technologies employ white light illumination technologies that are unable to properly identify defects on these exceptionally small Cu pillars before reflow (Figure 1). After reflow, the bump shape is very clean and very smooth, but before reflow and after plating, the Cu is very rough. Typically, when white light hits a very rough surface, the light randomly scatters. However, an inspection system that uses a coherent wavelength laser technology can overcome this challenge.
In addition, an integrated system using analytical software can be used to detect errors and provide real-time defect analysis and statistical process control. Analytical software can be used to provide in-line process control insights about defects and offer actionable corrections and is capable of handling millions of bumps per wafer, with each bump generating multiple data points. This integration helps manufacturers trace contamination sources and optimize cleaning steps, improving bonding reliability.
As for hybrid bonding, this emerging technology enables finer interconnect pitches of less than 10μm, allowing for more I/O terminals in a smaller area. This increased density translates directly into higher bandwidth and improved overall performance. Furthermore, by achieving near-zero spacing between dies, hybrid bonding significantly reduces overall package thickness and offers lower resistance and better thermal conductivity than bump-based methods. The result: improved signal integrity, reduced power consumption, and enhanced heat dissipation, each of which are critical for HBM.
Of course, hybrid bonding offers manufacturers its own set of challenges: increased sensitivity to particles and organic residues, lower yields and the introduction of more costly process and process control steps. But as significant as these challenges may be, these hybrid bonding obstacles can be addressed by employing a suite of advanced metrology, inspection, and software solutions.
Fig. 2: Hybrid bonding metrology and inspection challenges.
High-speed, sub-micron inspection can be used to detect surface anomalies such as particles, residues, and backside and edge defects (Figure 2). This ensures that bonding surfaces are clean and defect-free before the bonding process begins.
In addition to surface defects, overlay and voids present challenges. To address overlay errors, the capability to measure wafer topography and alignment with sub-micron precision enables accurate die placement and reduces the risk of misalignment during bonding. As for voids, a non-contact, immersion-free acoustic metrology technology capable of detecting voids down to 1µm is effective at identifying bonding defects that could lead to electrical or thermal failures. Furthermore, a sub-micron inspection system can be used to detect defects like cracks and delamination caused by thermal or mechanical stress.
New technologies are actively being adopted for interconnect control in HBM. In the case of bump process control, the sector is moving toward smaller dimensions. Long term, hybrid bonding is projected to become a mainstream interconnect technology, surpassing microbumps in many advanced applications.
Today and tomorrow, manufacturers will have a number of process control options that can help them solve their interconnect challenges, whether they use microbump or hybrid bonding technologies. There may be a fork in the road and two different paths, but regardless of which road manufacturers decide to travel, a comprehensive process control strategy integrating metrology, inspection, and advanced analytics should help them overcome the many obstacles along the way.
Woo Young Han joined Onto Innovation in 2000 and is currently Product Marketing Director, Inspection. He holds an Electrical Engineering degree from University of Toronto.
Tim Kryman is Product Marketing Senior Director, Metrology and Inspection. Tim has been with Onto Innovation for more than 20 years and holds a BS in Accounting and Information Systems from Lock Haven University and an MBA from DeSales University.
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