Digital Test Bulks Up – Or Down


Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing strategies due to the volume of test vectors required. In some cases, these chips are so large that they exceed reticle size, requiring them to be stitched together. New testing efficiencies are needed... » read more

Using ICs To Shrink Auto’s Carbon Footprint


A large portion of the burden for reducing greenhouse gases is being handed off to makers of automotive chips and systems, which are being tasked to make vehicles drive further using less energy and with zero emissions. The effort is critical in battling climate change. According to the U.S. Environmental Protection Agency, the transportation sector represented 28.2% of 2018 greenhouse gas e... » read more

A New Method For Electrical Systems Design


Electrical system complexity is reaching a tipping point across industries, from modern passenger vehicles to sophisticated industrial machines that can now contain nearly 5,000 wiring harnesses. The electrical systems of these machines contain multiple networks, thousands of sensors and actuators, miles of wiring and tens of thousands of discrete components (figure 1). Designing these complex ... » read more

Blockchain Attempts To Secure The Supply Chain


Blockchain technology is starting to be deployed more widely In the battle against counterfeiting, often coupled with component IDs to allow device authentication. Securing the supply chain is a complex challenge, particularly as more IP from more vendors in more locations makes its way into chips, packages or even systems. Being able to attest to the history of the device to prove its prove... » read more

Systematic Methodology To Solve Reset Challenges In Automotive SoCs


Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. The conventional clock domain and CDC verification methodologies cannot identify such critical bugs. In this paper, we prese... » read more

Blog Review: Dec. 2


Mentor's Harry Foster investigates the effectiveness of today’s FPGA verification processes in terms of nontrivial bug escapes into production as part of the 2020 Wilson Research Group Functional Verification Study. Synopsys' Chris Clark points to how integral sensors are to the modern vehicle and key design considerations for making them more effective, safe, and reliable. Cadence's Pa... » read more

MPU Vs. MCU


There was a time when microprocessors and microcontrollers were distinct devices. There was never a question as to which one you were dealing with. But changes in the memory architecture have muddied the distinction in modern devices. There are a number of ways in which microprocessors and microcontrollers could possibly be differentiated. But there is no universal agreement as to how that s... » read more

Blog Review: Nov. 25


Mentor's Harry Foster finds growing complexity in FPGA design by looking at the number of embedded microprocessors, asynchronous clock domains, and safety/security features in the 2020 Wilson Research Group Functional Verification Study. Cadence's Paul McLellan points to the interim SRC/SIA Decadal Plan for Semiconductors and five big shifts it identifies in information and communication tec... » read more

Silo Busting In The Design Flow


An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

Using AI And Bugs To Find Other Bugs


Debug is starting to be rethought and retooled as chips become more complex and more tightly integrated into packages or other systems, particularly in safety- and mission-critical applications where life expectancy is significantly longer. Today, the predominant bug-finding approaches use the ubiquitous constrained random/coverage driven verification technology, or formal verification techn... » read more

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