tag: Mentor

Blog Review: Mar. 11
By Jesse Allen - 11 Mar, 2020 - Comments: 0

Rambus' Steven Woo examines how the upcoming deployment of 5G will enable processing at the edge, and how the edge is getting refined further into the near edge and the far edge with a range of AI solutions across it. A Synopsys writer explains the types of Compute Express Link devices and CXL's unique verification challenges like maintaining the cache coherency between a host CPU and an acc... » read more

Test Costs Spiking
By Ed Sperling - 10 Mar, 2020 - Comments: 1

The cost of test is rising as a percentage of manufacturing costs, fueled by concerns about reliability of advanced-node designs in cars and data centers, as well as extended lifetimes for chips in those and other markets. For decades, test was limited to a flat 2% of total manufacturing cost, a formula developed prior to the turn of the Millennium after chipmakers and foundries saw the traj... » read more

Improving Functional Safety For ICs
By Mohammed Abdelwahid - 10 Mar, 2020 - Comments: 0

The exponential growth of electronics in automobiles have stimulated significant innovation towards the development of advanced safety mechanisms. In addition to very high-quality manufacturing test, ICs for safety-critical applications need in-system test to detect faults and monitor circuit aging. Scan-based logic built-in-self-test (LBIST) is the technique used for in-system test, but tradit... » read more

Taming Novel NVM Non-Determinism
By Bryon Moyer - 10 Mar, 2020 - Comments: 1

New memory technologies may have non-deterministic characteristics that add calibration to the test burden — and may require recalibration during their lifetime. Many of these memories are in development as a result of the search for a storage-class memory (SCM) technology that can bridge the gap between larger, slower memories like flash and faster DRAM memory. There are several approache... » read more

Grading Chips For Longer Lifetimes
By Ed Sperling - 10 Mar, 2020 - Comments: 0

Figuring out how to grade chips is becoming much more difficult as these chips are used in applications where they are supposed to last for decades rather than just a couple of years. During manufacturing, semiconductors typically are run through a battery of tests involving performance and power, and then priced accordingly. But that is no longer a straightforward process for several reason... » read more

AI Chip DFT Techniques For Aggressive Time-To-Market
By Mentor, a Siemens Business - 10 Mar, 2020 - Comments: 0

AI chips have aggressive time-to-market goals. Designers can shave significant time off of DFT and silicon bring up using the techniques described in this paper. Leading AI semiconductor companies have already had success with Tessent DFT tools. To read more, click here. » read more

Week In Review: Design, Low Power
By Jesse Allen - 06 Mar, 2020 - Comments: 0

Ansys will acquire Lumerical, a developer of photonic design and simulation tools. "The potential of photonics in applications like 5G, IIoT and autonomous vehicles can only be realized by solving immense multiphysics device and system challenges," said James Pond, co-CEO and CTO of Lumerical. "Together, Lumerical and Ansys are uniquely positioned to provide the necessary solutions, and custome... » read more

Automating Failure Mode Analysis For Automotive Safety
By Chuck Battikha - 05 Mar, 2020 - Comments: 0

By Chuck Battikha and Doug Smith If you’ve ever had to create a Failure Modes, Effects and Diagnostic Analysis (FMEDA), you know how difficult and painstaking a task it can be. But FMEDAs are essential in ensuring that your SoCs satisfy ISO 26262 functional safety analysis requirements for automotive designs and for demonstrating that your design is indeed safe. Because of the intens... » read more

New Architectural Issues Facing Auto Ecosystem
By Ann Mutschler - 05 Mar, 2020 - Comments: 0

As chips bound for the automotive world move to small process nodes, including 5nm and below, the automotive ecosystem is wrestling with both scaling issues and challenges related to architecting safety-critical systems using fewer chips. This may sound counterintuitive, because one of the main reasons automotive chip providers are moving to smaller nodes is to reduce the number of chips in ... » read more

The Criticality Of The E/E Architecture
By Mentor, a Siemens Business - 04 Mar, 2020 - Comments: 0

Modern vehicles are highly sophisticated systems incorporating electrical, electronic, software and mechanical components. Mechanical systems are giving way to advanced software and electronic devices, driving automakers to innovate and differentiate their vehicles via the electric and electronic (E/E) architecture. Future architectures need to be scalable across vehicle platforms, flexible to ... » read more

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