FPGAs Drive Deeper Into Cars


FPGAs are reaching deeper and wider inside of automobiles, playing an increasingly important role across more systems within a vehicle as the electronic content continues to grow. The role of FPGAs in automotive cameras and sensors is already well established. But they also are winning sockets inside of a raft of new technologies, ranging from the AI systems that will become the central logi... » read more

Market And Tech Inflections Ahead


Aart de Geus, chairman and co-CEO of Synopsys, sat down with Semiconductor Engineering to talk about the path to autonomous vehicles, industry dis-aggregation and re-aggregation, security issues, and who's going to pay for chips at advanced nodes. SE: All of a sudden we have a bunch of new markets opening up for electronics. We have assisted and autonomous driving, AI and machine learning, v... » read more

Where Is Selective Deposition?


For years, the industry has been working on an advanced technology called area-selective deposition for chip production at 5nm and beyond. Area-selective deposition, an advanced self-aligned patterning technique, is still in R&D amid a slew of challenges with the technology. But the more advanced forms of technology are beginning to make some progress, possibly inching closer from the la... » read more

What’s Next In R&D?


Luc Van den hove, president and chief executive of Imec, sat down with Semiconductor Engineering to discuss R&D challenges and what’s next in the arena. The Belgium R&D organization is working on AI, DNA storage, EUV, semiconductors and other technologies. What follows are excerpts of that conversation. SE: Moore’s Law is slowing down. And it is becoming more expensive to move fr... » read more

What Else Is In A Node?


In part one of this blog, I reported on the 2018 Industry Strategy Symposium (ISS) where Dan Hutcheson of VLSI Research led a panel with representatives of Synopsys, NVIDIA, Intel, ASML and Applied Materials. The participants discussed how the industry is focused on simultaneously squeezing more capabilities from leading-nodes, inter-nodes and trailing-nodes to drive advances in computing. I to... » read more

Chip Dis-Integration


Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

Sacrificial Laser Release Materials For RDL-First Fan-Out Packaging


The semiconductor industry is in a new age where device scaling will not continue to provide the cost reductions or performance improvements at a similar rate to past years when Moore’s law was the guiding principle for IC scaling. The cost of scaling below 7 nm nodes is rising substantially and requires significant investment in capital equipment and R&D spending for next-generation lithogra... » read more

What’s In A Node?


In an environment where process nodes are no longer consistently delivering the level of improvements predicted by Moore’s Law, the industry will continue to develop “inter-nodes” as a way to deliver incremental improvements in lieu of “full-nodes.” A shift in market requirements, in part due to the rise of AI and IoT, is increasing emphasis on trailing-nodes. When it comes to leading... » read more

More Lithography/Mask Challenges (Part 3)


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

More Nodes, New Problems


The rollout of leading-edge process nodes is accelerating rather than slowing down, defying predictions that device scaling would begin to subside due to rising costs and the increased difficulty of developing chips at those nodes. Costs are indeed rising. So are the number of design rules, which reflect skyrocketing complexity stemming from multiple patterning, more devices on a chip, and m... » read more

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