tag: semiconductor IP

Proprietary Vs. Commercial Chiplets
By Ed Sperling - 19 Dec, 2023 - Comments: 0

Large chipmakers are focusing on chiplets as the best path forward for integrating more functions into electronic devices. The challenge now is how to pull the rest of the chip industry along, creating a marketplace for third-party chiplets that can be chosen from a menu using specific criteria that can speed time to market, help to control costs, and behave as reliably as chiplets developed in... » read more

EDA, IP Growth Surges Again
By Ed Sperling - 24 Jan, 2023 - Comments: 0

EDA tools and IP revenue increased 8.9% in Q3 of 2022 to $3.767 billion, up from $3.458 billion in 2021, according to a just-released report from the ESD Alliance at SEMI. All regions except Japan reported growth, but the numbers were a bit more uneven in Q3 than in recent quarters. For example, total silicon IP dropped 1%, while services revenue grew 20.8%. At the same time, EDA revenue jum... » read more

Growing System Complexity Drives More IP Reuse
By Ann Mutschler - 12 Jan, 2023 - Comments: 1

IP reuse of both third-party and internal IP is growing, but it's also becoming more complex to manage. There is more IP being used, and more systems into which it needs to be integrated, combined with other IP, and tracked throughout an organization. In some cases, this is an economic requirement. In others, designs are so complex that engineering teams need to focus on where they will make... » read more

The Risk Of Losing Track Of Your IP
By Ed Sperling - 12 Jan, 2022 - Comments: 0

What happens when you misuse IP, intentionally or otherwise? Pedro Pires, applications engineer at Cliosoft, talks about the challenges of keeping track of IP across multiple chip design projects, which can grow to include dozens of third-party IP blocks, last for long periods of years, and span multiple continents. » read more

Many Chiplet Challenges Ahead
By Brian Bailey - 12 Apr, 2021 - Comments: 0

Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Trust Assurance And Security Verification of Semiconductor IPs And ICs
By OneSpin Solutions - 22 Apr, 2020 - Comments: 0

Connected autonomous vehicles, 5G networks, Internet-of-things (IoT) devices, defense systems, and critical infrastructure use ASIC and FPGA SoCs running artificial intelligence algorithms or other complex software stacks. Vulnerable or tampered ICs can compromise the safety of people and the confidentiality, integrity, and availability of sensitive information. This paper analyzes the trust... » read more

Visualizing Differences In Analog Design
By Ed Sperling - 11 Mar, 2020 - Comments: 0

Prathna Sekar, technical account manager at ClioSoft, explains the challenges of managing analog versus digital IP, including how to deal with dozens or even hundreds of versions of a schematic, and why visualization is so important for identifying changes and updates to an analog design. » read more

A New Dawn For IP
By Brian Bailey - 12 Dec, 2019 - Comments: 0

The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

IP’s Growing Impact On Yield And Reliability
By Ann Mutschler - 04 Sep, 2019 - Comments: 0

Chipmakers are finding it increasingly difficult to achieve first-pass silicon with design IP sourced internally and from different IP providers, and especially with configurable IP. Utilizing poorly qualified IP and waiting for issues to appear during the design-to-verification phase just before tape-out can pose high risks for design houses and foundries alike in terms of cost and time to... » read more

IP Tracking and Management
By Brian Bailey - 29 Nov, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, VP of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, VP of Marketing at Arm. What follows are excerpts from that conversation. SE: What is the scope of the problem? What are ... » read more

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