tag: Siemens EDA

Securing Modern-Day Devices With Embedded Virtualization And ARM TrustZone Technology
By Mentor, a Siemens Business - 06 Jul, 2015 - Comments: 0

When securing today’s modern devices, it’s not enough to know the type of device you want to secure. Equally important is the process used to develop that device. In this paper, we’ll take a closer look at security as it relates to protecting data, building security into a device, and securing SoCs in multicore architectures. ARM TrustZone technology, which provides a solution for carving... » read more

Executive Insight: Wally Rhines
By Ed Sperling - 01 Jul, 2015 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, sat down with Semiconductor Engineering to talk about what's changing across a wide swath of the industry, where the new opportunities will be, when security will become a real opportunity for EDA, and why Moore's Law will die but progress will continue forever. SE: Looking back over the past year, what's changed and where are the possible r... » read more

Blog Review: July 1
By Jesse Allen - 01 Jul, 2015 - Comments: 0

On the eve of his retirement, Cadence's Richard Goering takes a look back at 30 years of covering EDA: the highlights, the lowlights, and the headlights shining into the future. Established nodes are experiencing a much higher demand than one might normally expect at this point in their lifecycle. Mentor's Michael White examines the dynamics and market forces behind the longevity, and the ch... » read more

Wrong Verification Revolution Offered
By Brian Bailey - 25 Jun, 2015 - Comments: 0

SoC design traditionally has been an ad-hoc process, with implementation occurring at the register transfer level. This is where verification starts, and after the blocks have been verified, it becomes an iterative process of integration and verification that continues until the complete system has been assembled. But today, this methodology has at least two major problems, which were addres... » read more

Thermal Interface Materials: The Unknown Entity?
By Mathew Clark - 25 Jun, 2015 - Comments: 0

Thermal interface materials (TIMs) are becoming more important in all application areas and between different component parts. Any semiconductor, ranging from LEDs to high-power electronics, is becoming smaller, yet producing more power. In many ways the physical design limits have been reached for packaging, allowing entire components to have a total thermal resistance of less than 0.1 K/W. Ho... » read more

Dedicated ASIC Design Is Now Cost-Effective
By Mentor, a Siemens Business - 24 Jun, 2015 - Comments: 0

Current market and technology trends have increased the demand for mixed-signal ASICs. Smaller projects with modest design budgets are viable due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risk... » read more

Blog Review: June 24
By Jesse Allen - 24 Jun, 2015 - Comments: 0

Rambus' Aharon Etengoff reports on a new development enabling a needle measuring just a few millimeters in length to inject mesh electronics directly into the brain, and the medical possibilities of injectable electronics. ARM's Eoin McCann presents seven topics getting a lot of air time both in the booths and in speeches, presentations and panel discussions at DAC. Synopsys' Michael Posn... » read more

Full Coverage Or Full Monty
By Brian Bailey - 22 Jun, 2015 - Comments: 0

Without adequate coverage metrics and tools, verification engineers would never be able to answer the proverbial question: are we done yet? But a lot has changed in the design flow since the existing set of metrics was defined. Does it still ensure that the right things get verified, that time is not wasted on things deemed unimportant or a duplication of effort, and can it handle today’s hie... » read more

Litho Challenges Break The Design-Process Wall
By Katherine Derbyshire - 22 Jun, 2015 - Comments: 3

The days when chip designers could throw tape “over the wall” to the manufacturing side are long gone. Over the last several technology generations, increasingly restrictive process kits have forced designers to accommodate their circuit structures to the manufacturing process. Lacking a successor to 193nm lithography, the industry has turned to increasingly complex resolution enhancemen... » read more

Is EUV Making Progress?
By Ann Mutschler - 18 Jun, 2015 - Comments: 4

By Ann Steffora Mutschler & Ed Sperling EUV has been promised for a couple of decades, counted on for at least three process nodes on the ITRS roadmap, and considered essential to chip manufacturing since 22nm. Billions of dollars have been invested in R&D, engineering teams from around the world have contributed to its development, and still serious problems persist. Just how close... » read more

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