tag: Siemens EDA

Reverse Engineering
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Fabs and foundries frequently have been the savior of flawed designs, fixing problems such as power and performance, identifying design issues and often developing solutions to those problems. Over the next couple of process nodes, and in stacked die that will span multiple processes, there will be far fewer saves coming from the back end. Double and triple patterning, stress... » read more

Model Report Card
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler From its perspective as a leader implementing system level design methodology, STMicroelectronics is uniquely positioned to discuss issues and challenges related to the use of models in a variety of use cases. System-Level Design had the opportunity recently to discuss challenges in the modeling space with Jean-Marc Chateau, director of ST’s SPT (System Platforms a... » read more

Roundtable: What’s Changing In System-Level Design
By Ed Sperling - 26 Jan, 2012 - Comments: 0

System-Level Design talks about what's changing and what's needed with Juan Rey of Mentor Graphics: Yervant Zorian of Synopsys; Michael McNamara of Cadence; Prasad Subramaniam of eSilicon; and Ravi Varadarajan of Atrenta. [youtube vid=8siiKBKD0-k] » read more

Power Matters
By Jon McDonald - 26 Jan, 2012 - Comments: 0

By Jon McDonald Power has been an active area of discussion for me recently. It's come up in a more concrete way than in past conversations: customers are more interested in discussing details and not as interested in the abstract concepts. An interesting outcome of this is that now we need more context, we need to understand what we mean when we talk about power analysis at the abstract, syst... » read more

Experts At The Table: Making Software More Energy-Efficient
By Ed Sperling - 20 Jan, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss software and power with Adam Kaiser, Nucleus RTOS architect at Mentor Graphics; Pete Hardee, marketing director at Cadence; Chris Rowen, CTO of Tensilica; Vic Kulkarni, senior vice president and general manager of Apache Design, and Bill Neifert, CTO of Carbon Design Systems. What follows are excerpts of that conversation. LPE: How d... » read more

When Worlds Collide: Saving Power In Communications Applications
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler The interplay of hardware and software is a given in every device that contains a semiconductor chip, but is typically felt more acutely in communications applications given the extremely close dependencies for everything power-related. Managing power in these situations just gets more challenging as consumers demand more and better applications on their tablets, smar... » read more

The Next Big Challenge
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ed Sperling Software is the next big target in the quest to make electronics more energy efficient, but it’s proving a far bigger challenge than most systems architects originally believed it would be. There are several very large big problems to deal with in software. Writing efficient code for small processors isn’t one of them. In fact, the proliferation of small processors across... » read more

Status Report: Power-Aware Design Flow
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler While the term “design flow” can be a moving target, there are some specific requirements for a low-power/power-aware tool flow. Looking at this from a high level, where is the industry today, and where is it headed? There are really two sides to power, which are almost like two sides of the same coin: power consumption and power integrity. And both of those ar... » read more

Rethinking Good Enough
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ed Sperling Power has been elevated from an afterthought to one of the top considerations and tradeoffs in SoC design, edging out performance and area in many cases and in some cases even cost and features. Tradeoffs in design always change, depending upon what the most pressing concern is among consumers at any time. For decades, performance was always the top of anyone’s list, follow... » read more

How Long Will 28nm Last?
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler As soon as a next generation semiconductor manufacturing process node is out, bets are taken on just how long the current advanced process node will last. The 28/20nm transition is no exception. There is certainly a benefit to moving from 40nm to 28nm. The  availability of high-k/metal gate technology offers quite a few advantages in terms of power reduction... » read more

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