What’s Next In System-Level Design?


Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to design at the system level. Semiconductor Engineering sat down to discuss what this means for designers today, and what the impact will be in the future, with Michal Siwinski, chief marketing officer at... » read more

Heat-Related Issues Impact Reliability In Advanced IC Designs


Heat is becoming a much bigger problem in advanced-node chips and packages, causing critical electrons to leak out of DRAM, timing and reliability issues in 3D-ICs, and accelerated aging that are unique to different workloads. All types of circuitry are vulnerable to thermal effects. It can slow the movement of the electrons through wires, cause electromigration that shortens the lifespan of... » read more

A Guide To Rigid-Flex PCB Design


In today’s electronics industry, compact, efficient, and versatile PCBs are in high demand. Rigid-flex technology allows engineers to design boards that bend and flex without compromising performance or reliability. Mastering rigid-flex PCB design can be challenging due to its unique requirements. Whether you're an experienced designer expanding your skills or new to the field, this ar... » read more

Data Center Thermal Management Improves


Thermal issues are plaguing semiconductor design at every level, from chips developed with single-digit nanometer processes to 100,000-square-foot data centers. The underlying cause is too many devices or services that require increasing amounts of power, and too few opportunities for the resulting heat to dissipate. “Everybody wants to try to do more in a small volume of space,” said St... » read more

Rigid-Flex PCB Design Guidelines


This white paper is designed to guide you through the intricacies of rigid-flex printed circuit board (PCB) design. In today's electronics industry, there has never been more demand for compact, efficient, and versatile PCBs. Rigid-flex technology has emerged as a game-changer, offering engineers the flexibility to design boards that can bend and flex without sacrificing performance or reliabil... » read more

Blog Review: July 17


Cadence's Xin Mu explains the PCIe ECN Unordered IO (UIO) feature in the PCIe 6.1 specification, which defines a new wire semantic and related capabilities to enable multiple-path fabric support and helps avoid unnecessary traffic for better bandwidth and latency. Synopsys' Dana Neustadter, Gary Ruggles, and Richard Solomon highlight the latest updates in the CXL 3.1 standard, including new ... » read more

Managing kW Power Budgets


Experts at the Table: Semiconductor Engineering sat down to discuss increasing power demands and how to address it with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice president of engineering at Empower Semiconductor.... » read more

Easing EV Range Anxiety Through Faster Charging


The automotive industry is developing new ways to boost the range of electric vehicles and the speed at which they are charged, overcoming buyer hesitation that has limited the total percentage of EVs to 18% of vehicles being sold.[1] Work is underway to improve how batteries are engineered and manufactured, and how they are managed while they are in use or being charged. This extends well b... » read more

Blog Review: July 10


Cadence's Paul Graykowski suggests using real number modeling to streamline digital mixed-signal verification using logic simulators and hardware emulators. Siemens' John McMillan and Microsoft's Amit Kumar introduce the basics of 3D-IC, describe the flow and data management challenges, look at the evolution of TSMC 3DBlox 1.0 and 2.0, and detail a physical verification and reliability analy... » read more

Security Focus Widens To HW, SW, Ecosystems


Hardware security strategies are pushing much further left in the chip design flow as the number of vulnerabilities in complex designs and connected devices continues to grow, taking into account potential vulnerabilities in both hardware and software, as well as the integrity of an extended global supply chain. These approaches leverage the speed of fixing problems in software, and the effe... » read more

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