Closing Functional And Structural Coverage On RTL Generated By High-Level Synthesis


Most hardware design teams have a verification methodology that requires a deep understanding of the RTL to reach their verification goals, but this type of methodology is difficult to apply to the machine generated RTL from High-level Synthesis (HLS). This paper describes innovative techniques to use with existing methodologies, for example the Universal Verification Methodology (UVM), to clos... » read more

Blog Review: Mar. 13


Mentor's Tom Fitzpatrick questions whether deep learning approaches can really help improve coverage in modern, complex designs. Cadence's Paul McLellan listens in at MWC as Huawei chairman Guo Ping defends the company's security practices and shows where its heading in 5G. Synopsys' Eric Huang checks out the newly announced USB4 specification, changes to previous USB names, and a few things ... » read more

Domain Expertise Becoming Essential For Analytics


Sensors are being added into everything, from end devices to the equipment used to make those sensors, but the data being generated has limited or no value unless it's accompanied by domain expertise. There are two main problems. One is how and where to process the vast amount of data being generated. Chip and system architectures are being revamped to pre-process more of that data closer to... » read more

Shedding Pounds In Automotive Electronics


Weight is emerging as a key concern for carmakers as more electronic circuitry is added into vehicles that are either fully or partially powered by batteries. As a result, chipmakers and OEMs are exploring alternative substrate materials, different types of sensor fusion, and new ways to reduce the number of wires. Adding pounds reduces driving range for electric or hybrid vehicles. The auto... » read more

Chip Design For The Age Of New Mobility


In the new age of mobility, vehicles are valued more and more for their electronic features instead of mechanical specifications. As a result, companies that are able to own and optimize the design of these critical electronics will capture more of the available profit. This is bringing traditional automotive manufacturers into the electronics business, while simultaneously attracting tech comp... » read more

Next Wave Of Security For IIoT


A rush of new products and services promise to make the famously un-secured Industrial IoT (IIoT) substantially more secure in the near future. Although the semiconductor industry has been churning out a variety of security-related products and concepts, ranging from root of trust approaches to crypto processors and physically unclonable functions, most IIoT operations have been slow to adop... » read more

ON Semiconductor Conquers Verification Challenges


Motor controller IC design for automotive applications, such as power mirror, seats, door locks, and door lift control, creates exceptional verification challenges. Particularly because these ICs must work for over 10 years and they live in harsh environments including -40° C to 150° C temperature ranges, voltages ranging from 7V to 40V, and potential electrostatic discharge and electromagnet... » read more

New Design Approaches At 7/5nm


The race to build chips with a multitude of different processing elements and memories is making it more difficult to design, verify and test these devices, particularly when AI and leading-edge manufacturing processes are involved. There are two fundamental problems. First, there are much tighter tolerances for all of the components in those designs due to proximity effects. Second, as a re... » read more

The Time Is Now For A Common Model Interface


By Ahmed Ramadan and Greg Curtis Driven by consumer demand for “cheaper, faster, and better,” the semiconductor industry is continually pushing the migration to smaller process geometries. This continued scaling of complex designs into advanced process nodes is critical for applications ranging from high-performance computing to low-power mobile devices. In the past, products like sma... » read more

The Problem With Post-Silicon Debug


Semiconductor engineers traditionally have focused on trying to create 'perfect' GDSII at tape-out, but factors such as hardware-software interactions, increasingly heterogeneous designs, and the introduction of AI are forcing companies to rethink that approach. In the past, chipmakers typically banked on longer product cycles and multiple iterations of silicon to identify problems. This no ... » read more

← Older posts Newer posts →