tag: SPICE

Simulations of Silicon Spin Qubits Based on a GAAFET (Teikyo U., Riken)
By Technical Paper Link - 30 Mar, 2026 - Comments: 0

A new technical paper, "Device/circuit simulations of silicon spin qubits based on a gate-all-around transistor," was published by Teikyo University and RIKEN. Abstract "We theoretically investigated the readout process of a spin–qubit structure based on a gate-all-around (GAA) transistor. Our study focuses on a logical qubit composed of two physical qubits. Different spin configuration... » read more

Combining SPICE With IBIS-AMI: Solving Advanced Signal Integrity Verification Challenges With Solido SPICE
By Siemens EDA - 06 Nov, 2025 - Comments: 0

This paper explores current technology trends in high-speed links, including high-speed memory and SerDes applications, highlighting the critical roles of combined SPICE-level and IBIS-AMI modeling for accurate verification. Verifying high-speed links with IBIS-AMI during the circuit design phase presents significant complexity due to the combined effects of equalization schemes, channel S-para... » read more

SOT-Based MRAM Design At 7nm (Georgia Tech, Intel)
By Technical Paper Link - 31 Oct, 2025 - Comments: 0

A new technical paper titled "Comprehensive device to system co-design for SOT-MRAM at the 7nm node" was published by researchers at Georgia Institute of Technology and Intel. Abstract "This work presents a comprehensive spin-orbit torque (SOT) based random access memory (MRAM) design at the 7nm technology node, spanning from device-level characteristics to system-level power performance ar... » read more

AI-Empowered Analog IC Sizing Methods (Univ. of Glasgow Et Al.)
By Technical Paper Link - 10 Oct, 2025 - Comments: 0

A new technical paper titled "From Systematic to Intelligent: Assessing AI-Empowered Optimization Techniques for Analog Building Block Sizing" was published by researchers at University of Glasgow, Mediatek, The University of Edinburgh, Magics Technologies NV, University of Sevilla and Georgia Institute of Technology. Abstract "This paper presents a comprehensive, design-insight-based compa... » read more

Simulations à la Carte: Infusing SPICE Models For A Tasty Design Experience
By Jaime Zapata-Amores - 01 May, 2025 - Comments: 0

Have you ever noticed how the simplest dishes become unforgettable with just the right seasoning? As an Ecuadorian, I’ve learned this firsthand. A touch of “ají”—a traditional chili sauce—can transform any meal into something extraordinary. The tamarillo-based hot sauce is my personal favorite. It’s not just a condiment; it’s an experience. And when it comes to power electronics,... » read more

Design Optimal ESD Protection With Context-Aware SPICE Simulation
By Neel Natekar - 29 Aug, 2024 - Comments: 0

Electrostatic discharge (ESD) is a major reliability concern for modern ICs. Ensuring the robustness of ICs in an ESD event by providing adequate ESD protection is proving to be a major challenge for IC designers due to factors such as shrinking of the design features, reduction in gate oxide thickness, increase in the contact and interconnect resistance and an increase in the overall design co... » read more

Latency, Interconnects, And Poker
By Ed Sperling - 20 Feb, 2024 - Comments: 0

Semiconductor Engineering sat down with Larry Pileggi, Coraluppi Head and Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University, and the winner of this year's Phil Kaufman Award for Pioneering Contributions. What follows are excerpts of that conversation. SE: When did you first get started working in semiconductors — and particularly, EDA? Pileggi: This w... » read more

SRAM-Based IMC For Cryogenic CMOS Using Commercial 5 nm FinFETs
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs” was published by researchers at University of Stuttgart, Indian Institute of Technology Kanpur, University of California Berkeley, and Technical University of Munich. Abstract: "Cryogenic CMOS circuits that efficiently connect the classical domain with the quantum world are the co... » read more

No Hot Products
By Mike Donnelly - 14 Sep, 2023 - Comments: 0

While marketers strive to launch the next “hot” product, engineers struggle to prevent literally hot products! A recent breakthrough in thermal modeling comes just in time as electronic component manufacturers and their OEM customers increasingly battle thermal design issues. Analog electronic component manufacturers have traditionally provided models in SPICE format so customers can sim... » read more

Electro-Thermal Design Breakthrough
By Siemens EDA - 13 Sep, 2023 - Comments: 0

Electronic component manufacturers have traditionally provided models in SPICE format, so customers can simulate their application circuits and better understand the features, capabilities, and interactions of those parts in the system context. Now, with BCI ROM, a similar and parallel thermal model supply chain can develop. This technology breakthrough arrives at a time of component design-in ... » read more

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