tag: Synopsys

AI Testing: Pushing Beyond DFT Architectures
By Rahul Singhal - 27 May, 2021 - Comments: 0

Every day, more applications are deploying artificial intelligence (AI) system to increase automation beyond traditional systems. The continuous growth in computing demands of AI systems require designers to develop massive, highly parallel AI processor chips. Their large sizes and types of applications have a significant impact on their design and test methodologies. With thousands of repeated... » read more

Do We Have An IC Model Crisis?
By Brian Bailey - 27 May, 2021 - Comments: 0

Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

Pushing The Limits Of Hardware-Assisted Verification
By Ann Mutschler - 27 May, 2021 - Comments: 0

As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

Scaling Simulation
By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Blog Review: May 26
By Jesse Allen - 26 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Next-Gen SerDes Roadmap
By Ed Sperling - 25 May, 2021 - Comments: 0

An explosion in data is causing a series of successive bottlenecks in the data center. Priyank Shukla, product marketing manager for high-speed SerDes IP at Synopsys, digs into the performance roadmap for moving data within server racks and between different racks, where the bottlenecks are today, and how they will be addressed in the future. Related SerDes Knowledge Center Top stories... » read more

The Increasingly Uneven Race To 3nm/2nm
By Mark LaPedus and Ed Sperling - 24 May, 2021 - Comments: 2

Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 May, 2021 - Comments: 0

Siemens will acquire Supplyframe, a supply chain intelligence, sourcing, and marketplace platform for the electronics industry, for $700 million. The company operates on a software-as-a-service model and will serve as the nucleus of Siemens’ digital marketplace strategy, according to Cedrik Neike, member of the Managing Board of Siemens AG. “Supplyframe’s ecosystem and marketplace intelli... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 21 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Combining AI with IoT not only gives another acronym AIoT, or Artificial Intelligence of Things, but it puts AI systems on the edge. Infineon Technologies has released its ModusToolbox Machine Learning to make it possible to run deep learning-based workloads on Infineon’s PSoC microcontrollers. The toolbox has middleware, softwa... » read more

Managing Wafer Retest
By Anne Meixner - 19 May, 2021 - Comments: 1

Every wafer test touch-down requires a balance between a good electrical contact and preventing damage to the wafer and probe card. Done wrong, it can ruin a wafer and the customized probe card and result in poor yield, as well as failures in the field. Achieving this balance requires good wafer probing process procedures as well as monitoring of the resulting process parameters, much of it ... » read more

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