tag: Synopsys

Designing Low Energy Chips And Systems
By Ann Mutschler - 01 Feb, 2021 - Comments: 1

Energy optimization is beginning to shift left as design teams begin examining new ways to boost the performance of devices without impacting battery life or ratcheting up electricity costs. Unlike power optimization, where a skilled engineering team may reduce power by 1% to 5%, energy efficiency may be able to cut effective power in half. But those gains require a significant rethinking of... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Jan, 2021 - Comments: 0

The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

AI And ML Applications Require Advanced Datapath Verification
By Kiran Vittal - 28 Jan, 2021 - Comments: 0

In popular usage, the term “artificial intelligence” (AI) once conjured up images of robot armies subjugating humans or evil computers outsmarting their users, as in '2001: A Space Odyssey.' In recent years, AI has become a part of daily life for much of the planet’s population. People use voice commands to interact with their smartphones, smart speakers and even TV remote controls. Sophi... » read more

Roaring ’20s For The Chip Industry
By Brian Bailey - 28 Jan, 2021 - Comments: 0

2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

Big Changes In Verification
By Ann Mutschler - 28 Jan, 2021 - Comments: 0

Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems. Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn't always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted... » read more

Blog Review: Jan. 27
By Jesse Allen - 27 Jan, 2021 - Comments: 0

Synopsys' Godwin Maben finds that applications like high-performance computing and AI are bringing new dynamics to the power equation, and the key power considerations for chip design that will likely emerge over the course of the year. Siemens EDA's Harry Foster checks out trends in verification technology adoption for IC and ASIC design, with increasing numbers of designs using both dynami... » read more

Data Overload In The Data Center
By Ed Sperling - 25 Jan, 2021 - Comments: 0

Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible
By John Faase - 25 Jan, 2021 - Comments: 0

We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The way to manage these challenges is to interleave design tasks. For example, provide information on late-stage routing to early-stage synthesis tools to improve convergence. This technique is commonl... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Jan, 2021 - Comments: 0

Cadence will acquire NUMECA International, a provider of computational fluid dynamics (CFD), mesh generation, multi-physics simulation, and optimization solutions for industries including aerospace, automotive, industrial, and marine. “Next-generation products and systems require comprehensive multi-physics engineering solutions encompassing IP, semiconductors, IC packaging, modules, board... » read more

Blog Review: Jan. 20
By Jesse Allen - 20 Jan, 2021 - Comments: 0

Siemens EDA's Harry Foster takes a look at the amount of time IC and ASIC projects spend in verification, changes in the number of engineers on a project, and how engineers are spending their time. Synopsys' Stelios Diamantidis considers the importance of specialized accelerators for AI workloads as both cloud and edge push the PPA limits of current technologies. Cadence's Paul McLellan p... » read more

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